Introducing the VeriSNES (FPGA-based SNES)

Estrayk · Post by **Estrayk** » Fri Aug 11, 2017 2:56 pm

jwdonal wrote:Hello all,

I'm the creator of the VeriSNES. It was funny to discover that I already had my own thread on this forum.....considering I only just now registered.

In any case, I would like to discuss with whoever the board designer for the MiST is. I'm not at all familiar with the MiST board so I need some contact information. I'd like to discuss teaming up to get the VeriSNES ported to the MiST (if possible).

Thanks!

Open a donation PayPal account and I'm sure that MIST community will support you for buy a MIST for that you port your core.

Zarchos · Post by **Zarchos** » Tue Aug 15, 2017 8:36 pm

OK thanks.
I agree you can always find some good infos here and there, but from my ASM learning experience, I remember I would have prefered to be pointed to the RIGHT book from the start, written by sbdy who, it was obvious, actually mastered the topic, and had spent a lot of hours doing good, optimised coding.

Thanks for your help, highly appreciated.
It is good to be on an Atari forum : the community spirit is high !

squid4 · Post by **squid4** » Thu Aug 17, 2017 6:31 am

That Japanese SNES fpga developer has just released his source! Looks like he's been monitoring the latest VeriSNES news.
https://www.reddit.com/r/fpgagaming/com ... _japanese/

jwdonal · Post by **jwdonal** » Thu Aug 17, 2017 6:36 am

Lol. Hate to burst your bubble, but it's not source. Not even close. It's a bitstream file only, locked to a specific FPGA device, locked to a specific FPGA board, 4-bit color output only, and 1-bit audio output to GPIO pins which requires an amplifier to hear. So yeah, not source.

Also, even if he does release the source he wrote it in this weird high-level synthesis language used in Japan called "SFL" which isn't even Verilog/VHDL. He has stated several times that he has no idea how to write HDL.

Cya!

squid4 · Post by **squid4** » Thu Aug 17, 2017 9:10 am

Darned Google Translate

jwdonal, the world is your oyster then! I almost wet myself when you announced VeriSNES maybe ported to the MiST/MiSTer (MiST 2?). That would be the "killer app" for FPGA.

axxxtz · Post by **axxxtz** » Tue Aug 29, 2017 2:19 pm

Hi @all,
just ordered my DE10-Nano for MiSTer...
I would go nuts for a fully working SNES core!
And donate via PayPal ;D ...
Kind regards, Alex

jwdonal · Post by **jwdonal** » Fri Sep 15, 2017 6:51 pm

Hello all,

The VeriSNES has been ported to the DE10-Nano w/ Mister daughter boards and also now supports HDMI. See here:

https://www.youtube.com/watch?v=7ae5iUe8diY

Enjoy!

NegSol · Post by **NegSol** » Fri Sep 15, 2017 7:32 pm

Wow - I am lost for words - great job!!!

NML32 · Post by **NML32** » Fri Sep 15, 2017 7:39 pm

This is fantastic news!!

Sorgelig · Post by **Sorgelig** » Fri Sep 15, 2017 9:52 pm

jwdonal wrote:The VeriSNES has been ported to the DE10-Nano w/ Mister daughter boards and also now supports HDMI. See here:
https://www.youtube.com/watch?v=7ae5iUe8diY
Enjoy!

Do you mean enjoy just the video? I can't find a download link.

nightshadowpt · Post by **nightshadowpt** » Sun Sep 17, 2017 3:44 pm

Nice!

I'm pretty sure this will massively attract people to the MiSTer.

Good job!

yarko · Post by **yarko** » Sun Sep 17, 2017 5:27 pm

Will this core fit into Mist fpga?

DrWaka · Post by **DrWaka** » Fri Oct 06, 2017 8:14 pm

Is there pre-order list or site for this core? Or are you still deciding on how you will release this? I watched the 2017/09/15 video and understand this is still being worked on, but since it is 30 days since your last I wanted to ask if you had any news. Also will this require the memory addon card for this core to work? Many thanks to your hard work on this awesome and amazing project.

nathan1974au · Post by **nathan1974au** » Sat Nov 25, 2017 10:45 am

Sorgelig wrote:
jwdonal wrote:The VeriSNES has been ported to the DE10-Nano w/ Mister daughter boards and also now supports HDMI. See here:
https://www.youtube.com/watch?v=7ae5iUe8diY
Enjoy!
Do you mean enjoy just the video? I can't find a download link.

lol I feel your pain! what a build up then

silverfox0786 · Post by **silverfox0786** » Thu Apr 19, 2018 9:08 am

is there any more news on this

Televicious · Post by **Televicious** » Sun Oct 07, 2018 5:52 am

yarko wrote:Will this core fit into Mist fpga?

Doubtful. VeriSNES was built on the largest Cyclone 4, MiST is a medium/low sized Cyclone 3. Hopefully MiSTer will get an ST core and MIDI bus so it can be a proper successor.

nathan1974au · Post by **nathan1974au** » Mon Nov 05, 2018 7:19 am

I think this jwdonal was bullshitting us! in believing he had a core to begin with! I could hook up an original snes and say I'm working on a core ENJOY! seems bullshit to me.

evdberg · Post by **evdberg** » Sun Nov 11, 2018 9:34 am

It is very weird to put so much effort in a project like this, come this far (seems almost(?) completed) and then not to release anything. Although I have to admit I have a few unreleased projects myself, I usually get stuck on the point of turning a working prototype (lib with cmdline) into a real product.

At first I thought he might have sold it to Analogue, but Kevin Horton is mentioned as designer. So I am wondering what is the reason he seems to have abandoned the project.

PhantombrainM · Post by **PhantombrainM** » Wed Nov 21, 2018 3:56 pm

I've just written to the VeriSNES developer about whether he's going to open his core as an open source project.

As far as I remember, he said a few years ago, he will do it as soon as someone else releases a SNES core. I reminded him and sent him the Github project and a Youtube link. Let's see what happens!

P.S.: Sorry, wrong Core. I meant the Japanese developer of Snes On Fpga. http://pgate1.at-ninja.jp/SNES_on_FPGA/ ... ml#release

bernouilli · Post by **bernouilli** » Fri Aug 16, 2019 8:33 am

Any news about the VeriSNES core?

NegSol · Post by **NegSol** » Fri Aug 16, 2019 11:49 am

nothing - R.I.P.

I am sorry about all the work hours wasted ...

Glad we have a better SNES Core now

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Introducing the VeriSNES (FPGA-based SNES)

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