SHIFTER reimplementation on FPGA

[ijor]

So to make a stand-alone shifter with the Altera parts I can access in this old version of Quartus, I guess it would basically need all the same hardware as the HDMI board: 16 pins of bidirectional level shifters, 9 pins of downward level shifters and 10 upward level shifter for the clock and RGB (as well as the 32MHz oscillator).

Btw, out of curiosity, what are you using for the bidirectional level shifters? Digital transparent switches or buffered transceivers?

[Smonson]

I'm using a transceiver (74ALVC164245) for the data bus. The 5-to-3.3 shifters are 74LVC245s and the 16MHz clock is buffered at the socket with an MC74VHC1GT125.

[ijor]

... the 16MHz clock is buffered at the socket with an MC74VHC1GT125.

I wonder if this is really needed. Did you happen to test without it? I'm not suggesting to not use a level shifter and it certainly improves the noise margin, but just curious because TTL compatible output levels probably work.

[Smonson]

I didn't test without it, but I had a huge amount of noise on my original prototype (that used stripboard) to the point where it rarely functioned. With the 3.3v clock passing through an unshielded ribbon cable, it seems worth having it. It's only a 40c part, and it's tiny (3x2.5mm), so not too many downsides. For something as important as the primary clock, especially.

[TotOOntHeMooN]

Really interresting topic and great work!

I have seen your result on the HDMI display.
Assuming it is scan doubled, Is the signal can be set to 15kHz too?

About the screen mode, it should be really intessesting to have something like:
- 320x200 8bit plan
- 320x200 4bit plans dual playfield

Do you think that could be achieved to allow to produce more colourful games?
By the way, have fun! ^^

[Smonson]

Thanks! Not sure what you mean by the 15KHz signal question. The signal coming in will be the ST's native line frequency (15 or 31KHz) and the output line frequency will always be 31KHz. The picture displayed is either 400 or 480 lines depending on whether borders are shown.

320x200x8 and similar modes are theoretically possible, but it would require an ST running st 16MHz. I don't personally have such a machine, so I can't help much on that front.

[TotOOntHeMooN]

Thank you for your fast answer.

I spoke about the output line frequency to be able to continue to use the original monitors or TV set with 200 lines resolutions.
Yes, it will require a 16MHz ST... I have found your topic because I was looking to redo a main board for my ST and though about using 2x shifter first. Now, I understand that is not your goal. May be an alternate usage when your will reach it?!

Keep go on!

[Smonson]

You can't actually generate a HDMI picture with 200 lines within the specification... The minimum pixel rate is something like 25MHz, so to generate an image with a small resolution you're supposed to use line-doubling. I'm always using 32MHz for the pixel rate, same as ST mono.

For a test, I did implement a 256-colour mode on this board, but since it's only running at 8MHz the resolution is just 160x200, which is not very good to look at.

[TotOOntHeMooN]

Sorry, probably my english is bad... I ask if the display can be done on a standard CRT monitor/TV set with 200 lines using your FPGA.
Thank you for doing the test. I understand that result will be 160x200 for a 8MHz CPU (it remember the Amstrad CPC mode 0).

If you are OK, I will be proud to use your final work on my own mainboard instead of having to steel a shifter from a second ST.
It will be really great to have more colourful games to do some VGA ports. Take your time and have fun!

[Smonson]

If we're talking about my HDMI mod board - sorry, there's no way to output analogue video from it at this time, because it doesn't have any circuitry to generate the analogue RGB signals.

But there's nothing preventing the Verilog code that I've published on github from being used to generate analogue video, if someone created a board for such a purpose. I assume that you had in mind a board that replaces the original ST shifter and performs the same job - although possibly with extra video modes.

I think it's a good idea and definitely within the realm of possibility. I see that spare shifters are out of stock on Exxos' store, perhaps they're getting difficult to come by.

[TotOOntHeMooN]

Yes, it should be a really good idea to offer a PCB to replace the standard part. (best with more features)

I don't know if it is compatible, but an alternative should be to use a resistors network or a 3x Nbit DAC to input the digital pixels data and output the analog signal. Last but not least, it can embed a 256 colours palette to reduce the FPGA design, if required.

[Smonson]

EDIT: double post, sorry

[Smonson]

an alternative should be to use a resistors network or a 3x Nbit DAC to input the digital pixels data and output the analog signal.

No need - the ST main board has these already.

embed a 256 colours palette to reduce the FPGA design

This would greatly increase the FPGA resources needed.

[TotOOntHeMooN]

I spoke about an external DAC IC that embed the colour palette to save FPGA resource (used on PC VGA and A1200).
Not to embed the palettes into the FPGA. (sure, it is not good for a Shifter replacement part)

By the way, do you know this FPGA : https://www.seeedstudio.com/Sipeed-TANG ... -2881.html
It looks really interresting by its price and capabilities into a small package.

[Smonson]

But the ST doesn't use a hard-coded palette, so it needs to be a dual-port RAM device. That means two buses going to the FPGA, which is quite a lot of pins at 9-12 bits each. It's something to keep in mind, I guess.

[TotOOntHeMooN]

Sure, I understand. Better to be set into the FPGA DPRAM in this case.
Thank you for your answers.

[Smonson]

I'm learning more about small FPGAs at the moment. If I'm in a position to do some experiments in this area I'll let you know how I get along. Right now for me, a lack of time is a big problem.

Maybe this is a project for you?

[TotOOntHeMooN]

Thank you to share your progress and let me know.

No sure if it is currently a project for me... I have to think about this Shifter replacement, but to do first my mainboard replacement because I don't want to hack too much my computer. And in this way, I will expect to understand it better.

[AdamK]

Hey, @Smonson haw advanced are you? They may be competition coming: https://github.com/c0pperdragon/Amiga-D ... o/issues/6

[Smonson]

It's not a contest

That project is quite different from my original one (which is now a collaboration between me, Icky and Exxos). That one appears to be an analogue frame grabber/rescaler, but our project is a purely digital scanline doubler. Thanks to Icky's electronic design skills, it's still coming along very well, but COVID has taken a huge toll on PCB fabrication and assembly which slowed it down quite a lot.

[Luposian]

Just over 2 years hence... I have a question... is the video shifter in the Atari 1040ST the "graphics card"? What parts (hardware) of the ST are directly involved to make it function?

[zerkman]

Many functionalities in the ST are handled by the custom chips. For video, the shifter displays the pixels coming from ram which is fetched by the MMU, and GLUE is responsible for generating the synchro signals (H/V sync, blank, DE) for the different screen modes at different frequencies (PAL, NTSC).

[unseenmenace]

Is this project still ongoing and if so how accurately does it replicate a standard shifter now? I wondered whether it could be adapted to still output analogue video through the ST's monitor port but with Low and Med res line-doubled so all 3 modes work with a VGA monitor?

[Smonson]

Is this project still ongoing and if so how accurately does it replicate a standard shifter now? I wondered whether it could be adapted to still output analogue video through the ST's monitor port but with Low and Med res line-doubled so all 3 modes work with a VGA monitor?

Just to the second point, I also have a project that does that documented on Exxos forum. For accuracy and cost I am using a socket for a real shifter rather than an FPGA model of the shifter.

[Smonson]

Just over 2 years hence... I have a question... is the video shifter in the Atari 1040ST the "graphics card"? What parts (hardware) of the ST are directly involved to make it function?

Yeah, the shifter is roughly analogous to a graphics card. It's actually pretty simple in its operation: another part of the system (the MMU chip) sends it 2 bytes of data every 4 CPU clocks, and it turns these into pixels and spits them out at regular intervals. It does very little other than that. The rest of the video signals are generated elsewhere in the system.

It can be in one of three standard modes: spitting out one low-res pixel every CPU clock cycle; or two med-res pixels every CPU clock cycle, or 4 hi-res pixels every CPU clock cycle. The shifter is connected directly to the ST's main clock, which is 32MHz, so that it can go that fast.

Whichever mode it's in it always adds up to 2 bytes every 4 CPU clocks, low res pixels are 4 bits, med res pixels are 2 bits and hi-res pixels are 1 bit.

These "pixels" that I'm referring to are digital signals from the shifter that lead to a 4-bit digital-to-analogue converter per colour, connected to the monitor socket. So 13 connections in total (4 bits each for red, green, and blue; and then one extra one for monochrome mode that doesn't have a DAC).