Excellent analysis - it has more information than I expected.
Sorgelig wrote: According to schematic hardware SPI on MCU has connection to FPGA, so at least communication with FPGA can be fast.
The board has a Flash memory connected to the FPGA. I wonder whether some sort of 'FPGA bootloader' could be designed that would run on FPGA fabric and would:
1) receive bitstream data over HW SPI from the MCU to the FPGA
2) store the bitstream to Serial Flash
3) do a soft reboot to force FPGA to load the stored bitstream from flash. Maybe the reboot could be done from MCU.
Of course the first installation would require to bitbang the 'FPGA bootloader' into the FPGA over the slow connection. Each core would need to include such bitstream loader (to allow loading different cores), but hopefully this would not occupy too many LE. It's just a thought, maybe this can not be done, or would be inefficient and slow as well.