Sorgelig wrote:The master clock for sigma-delta encoder is 50MHz.
This is a really interesting thing to notice for me. The highest quality digital recorders available record and playback sigma-delta at 2.8 or 5.6 Mhz, and use a so called noise-shaping filter which pushes quantization noise into the inaudible range.
the cheapest ones are $400 to $700, and then up from there.
The highest quality digital audio workstations in the world are called Pyramix and each component costs thousands of dollars... I looked at a picture of the pyramix DAC board, which, by itself costs $2000 and it uses a Xilinx Virtex II FPGA (plus a lot of analog hardware, of course)... Although i have no idea how a Virtex II compares to a Cyclone V, i thought the Virt-II was pretty old.
Anyhow, you've got me thinking, that this DE-10 nano could easily output or record super high quality audio for a fraction of the cost of these systems...
I'm gonna seriously look into this
Can you please point me to some good references on implementing sigma-delta audio on an FPGA?
I imagine it's pretty simple, right? you just compare the current sample with the last one and output a 1 if it's larger and a 0 if it's smaller, if i understand correctly...
What i don't understand is how you get a higher frequency output than what is recorded?