SNES core

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Grabulosaure
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Re: SNES core

Postby Grabulosaure » Wed Feb 06, 2019 12:13 am

paulbnl wrote:As I understand it the Linux side calculates the PLL needed so the initial frequency is already very close and the FPGA side only needs to make minor adjustments. So I don't understand why there is any sync loss. If my TV is losing sync because of the continuous frequency adjustments then it should constantly lose sync?


The current implementation is slow to realign the phase. After frequency and phase alignment, only small adjustments are necessary, within TV tolerance.

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Re: SNES core

Postby bitfan2011 » Wed Feb 06, 2019 4:34 am

OK, this core seems to be relatively crackle-free in the audio dept. now :]
Before, the Konami logo sounded like it was frying bacon after the main jingle played

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Re: SNES core

Postby paulbnl » Wed Feb 06, 2019 9:58 am

Grabulosaure wrote:
The current implementation is slow to realign the phase. After frequency and phase alignment, only small adjustments are necessary, within TV tolerance.


How slow is it? My TV resyncs within 2 seconds so it can't be more than a fraction of a second.

Does it make big changes to the output clock during initial alignment or is the scaler waiting with output until alignment is finished?

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Re: SNES core

Postby Sorgelig » Wed Feb 06, 2019 10:59 am

Grabulosaure wrote:The current implementation is slow to realign the phase. After frequency and phase alignment, only small adjustments are necessary, within TV tolerance.


How about this idea: No need to adjust the pixel clock. When VSync on output happens, keep it active till VSync (or other sync point) from the core's video happens. To provide more consistent video, output VSync must be held the whole line, so it should not be finished earlier than current output line ends. It especially should work good for cores outputing slightly lower refresh than standard. But i think it's not a problem to find the solution for higher refresh if this solution will work.

There can be variations. May be tweak the VSync won't work well, then probably bottom blank can be made variable, so when sync point from input happens, then output code will start to generate standard VSync and then new frame according to standard. Key point: always finish the current line, never break it, so HSync will be at standard same intervals. So only total amount of lines will vary.

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Re: SNES core

Postby paulbnl » Thu Feb 07, 2019 7:09 pm

I have done some tweaking on the minimum off_v & ofp_v values on lines 126,128 of pll_hdmi_adj.vhd and with off_v at 8 and ofp_v at 7 both my TV and monitor don't lose sync when loading a rom.

The latency is amazing. It's only a few milliseconds behind the CRT and that should be mostly my LCD monitors latency.

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Re: SNES core

Postby robfish » Sat Feb 09, 2019 8:08 pm

I created a new sd card with the latest installer and the snes core doesn't start. I have to power cycle to get the mister to work after starting the snes core. Any ideas why this is happening?

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Re: SNES core

Postby robfish » Wed Feb 13, 2019 10:09 pm

robfish wrote:I created a new sd card with the latest installer and the snes core doesn't start. I have to power cycle to get the mister to work after starting the snes core. Any ideas why this is happening?


I copied the snes map file from my previous sd card and now it works. The map file that was created before must have been corrupted, is this a possible bug?

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Re: SNES core

Postby Sorgelig » Mon Feb 25, 2019 12:23 am

Now all major chips are supported.
It's possible SPC7110 will be implemented at some point but it's not in the priority list.

Not sure if SatellaView/BSX will be implemented. It's more marginal very specific to JRPG and similar games fans speaking Japanese. And this task is more suitable for some Japanese developer who will be interested enough to spend the time and effort to make it implemented. From my point of view it's completely out of international SNES variant.

It's also unclear if MSU1 will be implemented. As far as i know it even requires a very fast SD card to work which means it most likely won't work with communication speed between HSP and FPGA in MiSTer. At the end, this chip is fictional, never existed in real SNES carts, used only for hacks and mods bringing just improved soundtrack and similar gimmicks. It doesn't bring new games.

Further updates will be more focused on bug fixes and stability improvements.

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Re: SNES core

Postby Sorgelig » Mon Feb 25, 2019 12:38 am

To sum up about remaining chips from Wiki:

ST011: there are many other Shogi (Chinese checkers) games exist. There are several such games with SA1.
ST018: same as above. Also this chip includes ARMv3 32bit CPU which doesn't even implemented in FPGA yet. It's more powerful than used in Archie core. Such a waste of resources for a simple Shogi game!
OBC-1: game requires a special light gun. So, useless.
S-RTC: this one is easy to implement, but it's just one Japanese game.
LR35902: use Gameboy core.
MX15001TFC: Similar to SatellaView, so comment is the same as for SatellaView above.

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Re: SNES core

Postby brNX » Mon Feb 25, 2019 12:46 am

Thanks a lot for both your work on this @Sorgelig and @srg320.

:cheers:

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Re: SNES core

Postby RandomRonn » Mon Feb 25, 2019 1:11 am

Thanks a ton!

Glad to see SA-1 implementation! This essentially brings the MiSTer SNES core up to Super NT + SD2SNES level!

Amazing.

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Re: SNES core

Postby kitrinx » Mon Feb 25, 2019 2:19 am

What an incredible time to be alive. Super FX and SA-1 barely a month apart, what an amazing accomplishment. Thank you srg320 and Sorgelig for everything you do.

BTW:
The S-RTC game seems to work okay without the chip implemented, you just have to set the clock each time it starts. I scrolled through 45 minutes of cutscenes to check this. :(

Also, Satellaview can be pretty fun, you should try it sometime. I've enjoyed several of the games for it, especially the Zelda and Super Mario remakes/remixes and Shubibinman. In some ways it's about the same level of add-on as FDS was for NES.

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Re: SNES core

Postby GreyRogue » Mon Feb 25, 2019 2:30 am

What's with all this incredible progress? I feel lazy all on my own without needing to see all this great code being done as a reminder.

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Re: SNES core

Postby fry » Mon Feb 25, 2019 3:38 am

What are the chances for SPC7110?

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Re: SNES core

Postby Lightwave » Mon Feb 25, 2019 5:25 am

Sorgelig wrote:To sum up about remaining chips from Wiki:

ST011: there are many other Shogi (Chinese checkers) games exist. There are several such games with SA1.


I know it's irrelevant to your point but Shogi is actually Japanese chess; Chinese checkers is a totally different game (at least in English).

Anyway, Great job srg (and Sorg), thanks for all the work you put in to this. :cheers:

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Re: SNES core

Postby vanfanel » Mon Feb 25, 2019 11:56 am

Wow, this is SO incredible! :O
SA-1 too!!! You guys have implemented the most complete SNES system ever made.

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Re: SNES core

Postby Dirtbag » Mon Feb 25, 2019 1:07 pm

The standard of this SNES core is exceptional - well done Srg and Sorg :cheers:

Sorgelig wrote:Now all major chips are supported.
Not sure if SatellaView/BSX will be implemented. It's more marginal very specific to JRPG and similar games fans speaking Japanese. And this task is more suitable for some Japanese developer who will be interested enough to spend the time and effort to make it implemented. From my point of view it's completely out of international SNES variant.


Personally the opportunities to play systems that were not available to me when younger is half of the fun of MiSTer for me, I've had some interesting new experiences with some computer systems from different parts of the world that I would never have experienced otherwise. There are some interesting translation and fixed projects for the BS-X.

https://project.satellaview.org/bsx_what.htm & https://bszelda.zeldalegends.net/info.shtml are worth a look.

Maybe we need to get LuigiBlood a DE10 he can replicate the BS-X on the FPGA and the broadcast side from Linux :D

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Re: SNES core

Postby theimporter » Mon Feb 25, 2019 5:15 pm

Posted this on GitHub, but I'll post it here as well (https://github.com/MiSTer-devel/SNES_MiSTer/issues/38)

Chrono Trigger has small graphical glitches when a battle starts. It happens on my 4KTV and my LCD monitor (via VGA). I tried different resolutions and Vsync options, but I still get the issue.

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Re: SNES core

Postby Sorgelig » Sun Mar 03, 2019 9:09 am

Does anyone still have problem with F1 ROCII? It seems the sound problem has been fixed.

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Re: SNES core

Postby breiztiger » Mon Mar 04, 2019 4:43 pm

hello

sound might be ok in F1 ROC II (US) (DSP Seta) but with black screen for me …

edit : oups after mister reset it's ok

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Re: SNES core

Postby PhantombrainM » Mon Mar 04, 2019 7:15 pm

Are SNES save files not created automatically? I don't see an entry in the OSD for corresponding games, but only for titles where I had created a .sav myself a year ago and they have been copied automatically into the saves folder some months ago. Or do I mix it up with other cores like the Genesis, where it is automatically displayed in the OSD and creates the file if it supports the game and for SNES you have to create them all manually? Or is it a recent bug? I am confused right now! :coffe: :lol:
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Re: SNES core

Postby Sorgelig » Mon Mar 04, 2019 7:49 pm

Due to some changes in last update of MiSTer, cores need update in order to create a saves.
I will update the cores with saves soon.

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Re: SNES core

Postby bitfan2011 » Tue Mar 05, 2019 7:32 am

OSSC seemed slightly confused by latest SNES core via VGA
like it was negotiating sync and the OSSC slowly sorted it out. so weird.

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Re: SNES core

Postby JamesF » Tue Mar 05, 2019 8:02 am

I use a VGA to SCART cable, and it syncs just as fast as the previous builds or the real console.
Using VGA to VGA with scandoubler also works just as fast.
I don't see any problems here with OSSC compatibility.

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Re: SNES core

Postby MordecaiWalfish » Wed Mar 06, 2019 10:56 am

James provided me a compiled build of the latest SNES core with the current commits (I'll refer to this as 'SNES Test') to see if it fixed the analog line noise introduced by the last official SNES core release, and this build fixes it, however it seems to be introducing a new issue.

The new core seems to have some kind of negative interaction with the current TGFX16 core (2-18-19). When loading the SNES test core into a game it plays just fine, but then if you cold-reboot and try loading the TGFX16 core there is only audio-- no video. This happens with both vsync_Adjust 1 and vsync_adjust 2, but does not effect vsync_adjust 0. You have to physically unplug the DE-10 nano and then plug it back in to get video to show for the TGFX16 core at this point.

Even stranger is that this works both ways. If you freshly power on the MiSTer and first load up the TGFX16 core, everything runs fine. Then do a cold-reboot and load up the SNES Test core, and there is only audio-- no video. Again, this only effects vsync_adjust 1 and vsync_adjust 2. If you go through this process with vsync_adjust 0, it runs as expected.

This is 100% reproducible on my end and seems to indicate that some kind of output frequency data is not being cleared when doing a cold-reboot through the menu.

EDIT-- I should have been more specific about this, but when the cores exhibit this weird behavior and do not display video, the OSD still works and is fully functional/visible. just the core video is not there and only audio.
Last edited by MordecaiWalfish on Wed Mar 06, 2019 3:14 pm, edited 1 time in total.


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