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ijor wrote:I will use this thread to post WIP details of my work on reverse engineering the ST custom chipset by layout inspection and analysis.
ijor wrote:Below are simulation waveforms for the above circuit (SHIFTER Reload Control).
leonard wrote:ijor wrote:Below are simulation waveforms for the above circuit (SHIFTER Reload Control).
This is awesome! As I'm not an hardware guy at all, I'm really fascinated how people like you can understand and even more "predict" weird shifter effects by just looking at a custom chip
Now I dream about a new emulator, working at low level (same level as you describe). Could be a bit slow but will emulate perfectly all ATARI video tricks (even "closure" demo by Sync) without any high level emulation hack.
Steven Seagal wrote:The next version of Steem SSE will also emulate the full system cycle by cycle.
In fact, because of distinct clocks (MFP...), microcycles will be used.
This will include statemachines for CPU, Shifter, GLUE, MMU, WD1772, etc.
There's already a working proof of concept (CPU load and speed are fine), but I'm waiting for some further details in ijor's schematics.
The great advantage is that "GLU/Shifter tricks" are handled at a very low level, and are emulated without the need to know anything about them, a bit like for MFM/SCP emulation and disk protections.
The source is not available at SF yet.
leonard wrote:This is awesome! As I'm not an hardware guy at all, I'm really fascinated how people like you can understand and even more "predict" weird shifter effects by just looking at a custom chip
Steven Seagal wrote:I have some trouble saving the full pics.
One question we have no answer to is how to explain the apparently different timing for DE on/off in GLUE and in Shifter.
In the ST schematic, there's a DE line between GLUE, MMU, Shifter and MFP.
In the MFP it triggers Timer B, when the Shifter toggles real pixels (not border) display.
GLUE DE off at emulator cycle 376 for a regular 50hz line.
Timer B triggers at cycle 404 = 376 + 28
28 = GLUE-MMU latency 8 + prefetch 16 + Shifter latency 4
leonard wrote:Now I dream about a new emulator, working at low level (same level as you describe). Could be a bit slow but will emulate perfectly all ATARI video tricks (even "closure" demo by Sync) without any high level emulation hack.
npomarede wrote:handling everything at the cycle level will require quite some work if you go as low as precise bus accesses and how the glue/mmu/shifter see data on the bus for example
ijor wrote:SHIFTER shift registers reload control logic schematics (now complete):
larsbrinkhoff wrote:EDIT: Oh, pixCntr! Right? Still, DE?
Is pixCntr involved in the pixel output from RR?
larsbrinkhoff wrote:Is pixCntr involved in the pixel output from RR?
ijor wrote:SHIFTER shift registers reload control logic schematics (now complete):
stefanberndtsson wrote:I'm guessing the lower Q's on the DFF's up on top are really the !Q's ...
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