CT60e new features.

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CT60e new features.

Postby willy » Thu Feb 23, 2017 7:33 pm

CT60e is 100% back compatible with earlier versions (CT60, CT63) But not with CTPCI.

Docs:
http://jil.guru/32bit/CT60e/doc/
http://jil.guru/32bit/CT60e/doc/chg.pdf

Installation manual on way.

Beside of new mechanical layout, there is a new MGMt chip, which has replaced the old ADC chip(temperature control).

The new features are:
Core temperature reading in 0,01°C units (also support for legacy format).
Board temperature reading 0,01°C units (actually it is MGMt chip core temp.)
3,3V rail monitoring in 10 mV units.
5V rail monitoring in 10 mV units.
UUID Version 4, Variant 1. Containing SN. Even 2 boards with same SN will have different UUID's.
64 bytes OTP FlashRom, Divided for 0x10 independent programmable blocks. Every block may be programmed only ONCE. No way to erase.
Block 0x00 contains preprogrammed SN.
0x0f Blocks is avaliable for user. (Maybe Asset Tag)


CT60e MGMt chip commands description:

Current firmware version is:

Code: Select all

#define version "2.2.e"


MGMt chip i2c bus address is:

Code: Select all

#define i2c_address   0x77


For detailed description refer to *DIMM EEPROM* chapter in *CT60 HARDWARE GUIDE*
And of course to generic i2c protocol description.

all commands are 1byte + evt. payload, and are returning 4 bytes or more

Simplified protocol description:

start
send sla+w
send command
restart
send sla+r
receive 4 bytes or more, send NACK after last byte.
stop

All results are encoded in LITTLE ENDIAN convention

Code: Select all

enum i2c_commands {
//command      value       ascii      bytes to read   - Additional info
   get_v33      = 0x33,      // '3'   -   4            - Voltage on 3.3V Rail in 10 mV units
   get_v50      = 0x35,       // '5'   -   4            - Voltage on 5V   Rail in 10 mV units

   get_tAmb   = 0x41,      // 'A'   -   4            - Ambient Temperature in 0,01°C units (Actualy it is MCU core temp)
   get_t060   = 0x54,      // 'T'   -   4            - 68060     Temperature in 0,01°C units

   get_UUID   = 0x55,      // 'U'    -   36           - Get slashed ascii UUID: XXXXXXXX-SNSN-XXXX-XXXX-XXXXXXXXXXXX


   // SN is located in pr0m_0. And is encoded as:
   // all numbers are Little Endian !! SN is included in UUID as bytes nr. 5 and 6
   // int16_t SN   ;Serial number as SIGNED 16 bit int. It means *UNPROGRAMMED* SN = -1;
   // uint32_t xSN   ;Stored LongWord (32 bit)
   // xSN = (((uint32_t)~SN << 16) | (uint16_t)SN);
   // It's kind of self verification.
   // locations pr0m1 to pr0mf are empty, and can be used by user.

   get_sn      = 0x60,    // '`'   -   4
   get_pr0m_1   = 0x61,      // 'a'   -   4
   get_pr0m_2   = 0x62,      // 'b'   -   4
   get_pr0m_3   = 0x63,      // 'c'   -   4
   get_pr0m_4   = 0x64,      // 'd'   -   4
   get_pr0m_5   = 0x65,      // 'e'   -   4
   get_pr0m_6   = 0x66,      // 'f'   -   4
   get_pr0m_7   = 0x67,      // 'g'   -   4
   get_pr0m_8   = 0x68,      // 'h'   -   4
   get_pr0m_9   = 0x69,      // 'i'   -   4
   get_pr0m_a   = 0x6a,      // 'j'   -   4
   get_pr0m_b   = 0x6b,      // 'k'   -   4
   get_pr0m_c   = 0x6c,      // 'l'   -   4
   get_pr0m_d   = 0x6d,      // 'm'   -   4
   get_pr0m_e   = 0x6e,      // 'n'   -   4
   get_pr0m_f   = 0x6f,      // 'o'   -   4

   get_uuid   = 0x75,      // 'u'    -     16            - get numeric uuid, just 128bit number. remember *LE*

   // active commands answer =0 means OK, answer = cmd -> error, any other error code.
   // To use any of the active command, you do need to put MCU into a 'reset mode'
   // To do that. You need to pull THCS line down, and issue 0x060e pulses on THCK line.
   // (Refer to *THERMAL SENSOR* chapter in *CT60 HARDWARE GUIDE*
   // After issuing the RESET command, MCU will wait for 8sec. for incomming command,
   // And then reset or execute one of the following commands:

   resetReset   = 0x78,      //ascii   'x' - Break the reset sequence
                     //i2c_buffer[1] shout be ~0x78 = 0x87 followed by CRC16
                     //i2c_buffer[2] = 9F, i2c_buffer[3] = 60   -> crc = 0x609F in reverse order

   bootloader   = 0xbb,      // call bootloader - no exit
                     //i2c_buffer[1] shout be ~0xbb = 0x44 followed by CRC16
                     //i2c_buffer[2] = B7, i2c_buffer[3] = CA   -> crc = 0xCAB7 in reverse order.

   writeIFR   = 0xf1      //i2c_buffer[1] shout be ~0xf1 = 0x0e followed 2 bytes IFR index (0x00 to 0x0f) in reverse order
                     //and 4 bytes of data and 2bytes crc16.
                     //The new programmed value will be present after next reset.
                     // used crc16 version is:
                     //CRC16_CCIT_ZERO (Polynomial: 0x1021; Initial Value: 0x0; Final Xor Value: 0x0)
};


Legacy temperature reading is still avaliable.

But ... reading 16 more bits you will get more acurate temperature (same as get_t060 i2c command) in fastest way.

Both i2c, and legacy temp reading should work flawless up to 400kHz.
In teory it should go up to ca. 1MHz ... maybe more. Was not tested.



The board comes with preprogrammed TOS 4.04 boot 1.03c - slightly patched to support any compatible flash. The patched tos can be found here: http://jil.guru/32bit/CT60e/TOS/Legacy/
Here you can find Patched (recompilled) tools http://jil.guru/32bit/CT60e/Tools/Legacy/ that supports all compatible flash chips.

The flash chip used on CT60e is not compatible with old tools. But patched tools are compatible with all (even manufactured in future) compatible flash chips ,)

Clock is preprogrammed to 66MHz. If your processor is slower. You can put a jumper across recovery jumper, located right next to F030 power connector. It will decrease the frequency by half to 33MHz. My both 68060 CPU's rated 50MHz was able to run @100+MHz.

If you are planing extreme overclocking, I will disapoint you. Clock buffer used in CT60 design can work up to 133MHz - but with load capacity of max 10pF and 100MHz with load capacity of 30pF.
MC68060 input capacity is about 20pF+ some capacitance of traces etc. I would say 105 MHz is safe maximum.

The memory connector is not designed to constatly replacing the RAM module. It is rated to 25 cycles! At least one cycle was used in test.

Image
Last edited by willy on Sun Mar 05, 2017 9:46 pm, edited 3 times in total.

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Re: CT60e new features.

Postby willy » Wed Mar 01, 2017 12:40 am

Source code and a simple tool to reading parameters can be found here:
http://jil.guru/32bit/CT60e/Tools/ct60e_utility_demo/
Project in eclipse, c++, m68k-atari-mint toolchain.

Screenshot:
Image

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Re: CT60e new features.

Postby 1st1 » Wed Mar 01, 2017 6:25 am

This looks great. WIll someone make an ACC of this which also pops up for warnings?
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Re: CT60e new features.

Postby willy » Wed Mar 01, 2017 7:05 am

I forgot to mention, The board comes with preprogrammed TOS 1.03c - slightly patched to support any compatible flash. The patched tos can be found here: http://jil.guru/32bit/CT60e/TOS/Legacy/
Here you can find Patched (recompilled) tools http://jil.guru/32bit/CT60e/Tools/Legacy/ that supports all compatible flash chips.

The flash chip used on CT60e is not compatible with old tools. But patched tools are compatible with all (even manufactured in future) compatible flash chips ,)

As the 68k family chips does not have any power management instructions, the power consumption is almost same when it is waiting for user input, or when it is rendering graphics. There may be a slight difference in cache activity etc.
Therefore temperature in iddle state should be almost same as in 100% load.

On the screen you can see temperature of 68060R50@66Mhz WITHOUT any radiator !! after ca. 2 hours of work. I didn't noticed any significant temperature change when i started some demos. Max temp was ca.73C WITHOUT any radiator.

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Re: CT60e new features.

Postby joska » Wed Mar 01, 2017 7:17 am

willy wrote:I forgot to mention, The board comes with preprogrammed TOS 1.03c - slightly patched to support any compatible flash.


What's "TOS 1.03c"? What's that based on?
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Re: CT60e new features.

Postby AdamK » Wed Mar 01, 2017 8:11 am

Thats CT60 TOS 1.03c.
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Re: CT60e new features.

Postby wongck » Wed Mar 01, 2017 12:07 pm

Can be considered be the elder brother of FireTos?
I believe it's the last version on CT60 that does not support CTPCI.
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Re: CT60e new features.

Postby willy » Thu Mar 02, 2017 7:01 pm

Exactly.

In fact is TOS 4.04 boot 1.03c
I've also patched a 4.04 boot 2.01 version witch CTPCI support.
Both are avaliale here: http://jil.guru/32bit/CT60e/TOS/Legacy/

BUT !!
CTPCI may not fit !! its because of its bizzare layout.

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Re: CT60e new features.

Postby mfro » Thu Mar 02, 2017 7:29 pm

willy wrote:.. As the 68k family chips does not have any power management instructions, the power consumption is almost same when it is waiting for user input, or when it is rendering graphics...


This is (at least not completely) true.

On a STOP instruction, all m68k processors stop bus activity until an interrupt occurs. It's just that no OS (except EmuTOS) supports this for power management.
A 060 also implements the LPSTOP ("low power stop") instruction (which is probably not used anywhere in Atari land).

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Re: CT60e new features.

Postby Faucon2001 » Thu Mar 02, 2017 8:14 pm

willy wrote:Exactly.

In fact is TOS 4.04 boot 1.03c
I've also patched a 4.04 boot 2.01 version witch CTPCI support.
Both are avaliale here: http://jil.guru/32bit/CT60e/TOS/Legacy/

BUT !!
CTPCI may not fit !! its because of its bizzare layout.

What do you mean by CTPCI may not fit?
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Re: CT60e new features.

Postby calimero » Thu Mar 02, 2017 8:26 pm

Does anybody know why Rodolphe Czuba called successor of CT60 - CT63? Why "3"?
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Re: CT60e new features.

Postby wongck » Fri Mar 03, 2017 12:21 pm

willy wrote:BUT !!
CTPCI may not fit !! its because of its bizzare layout.

Wow... please elaborate !
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Re: CT60e new features.

Postby wongck » Fri Mar 03, 2017 12:22 pm

calimero wrote:Does anybody know why Rodolphe Czuba called successor of CT60 - CT63? Why "3"?

It's the 3rd revision... I think include the CTCM
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Re: CT60e new features.

Postby willy » Fri Mar 03, 2017 7:38 pm

mfro wrote:This is (at least not completely) true.
On a STOP instruction, all m68k processors stop bus activity until an interrupt occurs. It's just that no OS (except EmuTOS) supports this for power management.
A 060 also implements the LPSTOP ("low power stop") instruction (which is probably not used anywhere in Atari land).


Thanks for explanation !!.

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Re: CT60e new features.

Postby willy » Fri Mar 03, 2017 7:40 pm

wongck wrote:
willy wrote:BUT !!
CTPCI may not fit !! its because of its bizzare layout.

Wow... please elaborate !



Image

Look at the picture. There is no place for PCI ribbon cables !

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Re: CT60e new features.

Postby willy » Fri Mar 03, 2017 7:40 pm

First post Updated.

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Re: CT60e new features.

Postby wongck » Sat Mar 04, 2017 12:57 am

willy wrote:Look at the picture. There is no place for PCI ribbon cables !


Oh OK... does that mean you are going to do some more SuperVidel now?
I mean since you designed the CT60e to be in such a way.
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Re: CT60e new features.

Postby mikro » Sat Mar 04, 2017 3:01 am

willy wrote:Look at the picture. There is no place for PCI ribbon cables !

Even though the CTPCI wasn't exactly a success, this is rather disappointing. :-( I have one at home plus I wanted to work on plain CTPCI IDE support for Beetle (see here: viewtopic.php?f=97&t=30806#p306753) because it sounded like a nice feature.

From what I understand / see, the IDE cable wont be possible to fit either, better said, it looks like even the board alone wont fit near the CPU. Why did you decide to do something like that? You could at least ask the community...

EDIT: while looking at the picture again, I don't get it at all. :-) If the picture is upside down, i.e. the memory slot is where the PSU used to be, CTPCI cables are supposed to go right, i.e. the opposite way from the CPU, so what exactly is the problem?
Last edited by mikro on Sat Mar 04, 2017 3:07 am, edited 2 times in total.

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Re: CT60e new features.

Postby mzry » Sat Mar 04, 2017 3:02 am

When will orders be available?

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Re: CT60e new features.

Postby wongck » Sat Mar 04, 2017 3:58 am

mikro wrote:Why did you decide to do something like that?

No one need to explain. The photo clearly shows the obvious reason.
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Re: CT60e new features.

Postby wongck » Sat Mar 04, 2017 4:09 am

mikro wrote:EDIT: while looking at the picture again, I don't get it at all. :-) If the picture is upside down, i.e. the memory slot is where the PSU used to be, CTPCI cables are supposed to go right, i.e. the opposite way from the CPU, so what exactly is the problem?


There is just not enough clearance from the edge of the CT60e board to the pins where the addon board sites.
The IDE cables is coming from the underside of the CTPCI. The 2 innermost connectors are for the PCI interface. The height of the large IDE cables are higher than the CTCPI connecting to the CT60, so it needs the clearance. I really did not understand why Czuba designed it to use the large 40-PIn IDE. My only guess is pricing.

In your case, you can still use faster CTCPI IDE as it uses the outermost connector, but you may need to remove the 2 innermost connectors.

Check out the photos here.


But really I think it does not matter any more, as there are no more new CTPCI cards anyway. So the new CT60e just positioned itself out of the CTPCI users, which is micro anyway. So no real big lost. In any case if Nature builds more SuperVidel that goes very well with this new CT60e, then they have done themselves justice by doing so.
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Re: CT60e new features.

Postby mikro » Sat Mar 04, 2017 4:31 am

I see. Thank you for the explanation. In that case I can only repeat the question, why oh why... making a new batch which renders 33% of the hardware addons (ethernat, ctpci, supervidel) incompatible must have had some serious reason.

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Re: CT60e new features.

Postby willy » Sat Mar 04, 2017 7:55 am

Supervidel fits ok. (was checked)

Ctpci is intended to use in tower case.

Ct60e is intended to work with supervidel and svetlana (maybe in upgraded version) inside closed f030 case.

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Re: CT60e new features.

Postby 1st1 » Sat Mar 04, 2017 8:04 am

I Hope that ct60e is soon ready for shipment. And hoping that some supervidel will follow them...
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Re: CT60e new features.

Postby wongck » Sat Mar 04, 2017 9:02 am

willy wrote:Ct60e is intended to work with supervidel and svetlana (maybe in upgraded version) inside closed f030 case.


So there will be new batch of SuperVidel :-) great !!
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