npomarede wrote:I think I have an explanation for these 25-25 bytes : the DMA FIFO is in fact 2 FIFOs of 16 bytes, and DMA switches between each every 16 bytes.
In case of reading, both FIFO start empty. but in case of writing, both FIFO are filled first (because the DMA doesn't seem able to use a FIFO to send data to the FDC while the FIFO is refilled, so it must fill 2 FIFOs at start).
So, you will have up to 32 bytes ahead, and I guess that's why you end with more than 16 bytes when you do the force int.
If you stop a write track in the middle with a force int, I think you will get a similar result : an altered track where end of track will not be overwritten.
This is correct but I still have not figure out the exact timing that causes the extra 9 to 10 bytes.
Of course the DMA cannot transfer at the same time to the CPU and to the FDC. When a FIFO is empty a bus grant is made and a refill of the FIFO is perform in one operation (8 words transfer). But on the FDC side one byte is transferred at a time.
This is hopefully explained page 7 and page 10-11 of my FD programming doc v1.0 http://info-coach.fr/atari/documents/my ... LG-V10.pdf