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Code: Select all
// globals
char regsold[4]; // somewhere to keep the old mfp regs
char regsnew[4] = { 0,0,0,0 }; // some new mfp regs
void mfp_setup()
{
char *pnew = regsnew;
char *pold = regsold;
__asm__ __volatile__
(
"ori.w #0x0700,sr;"
"move.b #0xfffffaXX.w,(%1)+;"
"move.b (%0)+,0xfffffaXX.w;"
"move.b #0xfffffaXXX.w,(%1)+;"
"move.b (%0)+,0xfffffaXX.w;"
"move.b #0xfffffaXX.w,(%1)+;"
"move.b (%0)+,0xfffffaXX.w;"
"move.b #0xfffffaXX.w,(%1)+;"
"move.b (%0)+,0xfffffaXX.w;"
"andi.w #0xfbff,sr;"
: "+a"(pnew), "+a"(pold)
:
: "cc"
);
}
Code: Select all
inline uint32_t set_ipl(uint32_t ipl)
{
uint32_t ret;
__asm__ __volatile__(
" move.w sr,%[ret]\r\n" /* retrieve status register */
" andi.l #0x07,%[ipl]\n\t" /* mask out ipl bits on new value */
" lsl.l #8,%[ipl]\n\t" /* shift them to position */
" move.l %[ret],d0\n\t" /* retrieve original value */
" andi.l #0x0000f8ff,d0\n\t" /* clear ipl part */
" or.l %[ipl],d0\n\t" /* or in new value */
" move.w d0,sr\n\t" /* put it in place */
" andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */
" lsr.l #8,%[ret]\r\n" /* shift them to position */
: [ret] "=&d" (ret) /* output */
: [ipl] "d" (ipl) /* input */
: "d0", "cc" /* clobber */
);
return ret;
}
/*
* usage
*/
...
/*
* disable interrupts
*/
uint32_t old_ipl;
old_ipl = set_ipl(7);
/*
* do whatever you want to do with interrupts disabled
*/
...
/*
* enable interrupts again (restore saved interrupt level)
*/
set_ipl(old_ipl);
mfro wrote:The following should be usable as a drop-in into any C code (just put it into one of your header files). It's probably suboptimal regarding performance, but should work on anything m68k (including ColdFire).Code: Select all
[...]
: "cc" /* clobber */
[...]
mfro wrote:Make sure you call it in supervisor mode on anything else than a plain 68000. MOVE TO/FROM SR are privileged instructions.
Code: Select all
move #$2700,SR ; stop irq system
...
move #$2300,SR ; reenable irqs
Code: Select all
__asm__ __volatile__
(
"move.w #0x2700,%%sr;"
: : : "cc"
);
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