FX68K Cycle accurate 68000 core

[ijor]

FX68K

Copyright (c) 2018 by Jorge Cwik
fx68k@fxatari.com

FX68K is a 68000 cycle exact compatible core. At least in theory, it should be impossible to distinguish functionally from a real 68K processor.

On Cyclone families it uses just over 5,100 LEs and about 5KB internal ram, reaching a max effective clock frequency close to 40MHz. Some optimizations are still possible to implement and increase the performance.

The core is fully synchronous. Considerable effort was made to avoid any asynchronous logic.

Written in SystemVerilog.

The timing of the external bus signals is exactly as the original processor. The only feature that is not implemented yet is bus retry using the external HALT input signal.

It was designed to replace an actual chip on a real board. This wasn't yet tested however and not all necessary output enable control signals are fully implemented.

[ijor]

SystemVerilog sources:

http://fx68k.fxatari.com/fx68k-Source.zip

FX68K is released under the GPL open source license.
More material including notes, tables and charts, that I need yet to finish or polish, should be available at some later time.

[shoggoth]

Awesome!

[Sorgelig]

Congratulations and big thanks!

[BlankVector]

Congratulations

[OzOnE]

Fantastic work, Ijor.

And many thanks for the sources, as well.

You don't know how important this is for MiSTer, and FPGA retro stuff as a whole.

The 68000 is obviously a super-important chip for lots of machines, and even the Quantel Paintbox might now benefit from your core. hehe

I'll definitely be trying this core out on various MiSTer stuff in the next few days. Perfect timing for Capcom CPS, too.

[PhantombrainM]

Thank you very much! The world will benefit from it forever now!
Even If you're gone one day you have left something great in this world and it will make people and kids happy.
For me as a musician it's one of my life goals to give people something that lasts longer than I will live so it will make myself immortal and I'm not forgotten. Congratulations on that!

Out of pure curiosity, how long did it take you to complete it?

[Sorgelig]

SystemVerilog sources:

http://fx68k.fxatari.com/fx68k-Source.zip

FX68K is released under the GPL open source license.
More material including notes, tables and charts, that I need yet to finish or polish, should be available at some later time.

can you release it on github? Then there will be a central development repo for this IP, so you can get some pull requests if you don't mind.

[ijor]

Out of pure curiosity, how long did it take you to complete it?

Well, it depends on when you consider I really started ...

I started research and reverse engineering of the 68000 many years ago. I decrypted (so to speak, they are not encrypted, but they are barely readable) the patents, and study them long ago. Some time later I even implemented partial simulation models based on the patents.

I also performed tests and traces on real hardware. Some time ago I also analyzed the layout from decapped micro photographies.

If you mean when I actually started writing the core, well, that was just a few months ago. But that's the easy part when you have all the information.

[BitsNStuff]

Incredible work, so important for the preservation of chipsets. There is no easy way of creating soft chips but I just can't imagine the amount of work that goes into doing it this way.

On a slightly more selfish note, I'm sure people will forgive me...with time it really should benefit so many different FPGA implementations to have this soft chip available. I can't wait to see how this develops.

Thanks @ijor.

[ijor]

I moved all the posts specific to adapting Genesis core to the following thread: viewtopic.php?f=117&t=34736

[alien]

This is really cool

I'm curious, are the ROMs (mem files) taken from the decapping you did?

Or, if they're custom, do you have some tool to generate them rather than typing them in in binary? (in the dark ages before I had an assembler, I used Hex...)

[fury23]

Thank you so much

[vanfanel]

Thanks for all your work on this, Ijor, and the giant step it means regarding hardware recreation! This is historic...

[ijor]

can you release it on github? Then there will be a central development repo for this IP, so you can get some pull requests if you don't mind.

Done:
https://github.com/ijor/fx68k

[ijor]

I'm curious, are the ROMs (mem files) taken from the decapping you did?
Or, if they're custom, do you have some tool to generate them rather than typing them in in binary? (in the dark ages before I had an assembler, I used Hex...)

They are based on the die. I don't really have a clean automatic tool chain. Nor I really have a source at the language level you see at the patent. I have notes, tables and even some kind of spreadsheet, that as I said, I need to clean up before release.

The microcode at the die is coded at a lower level than what you see at the patent. Implementing a tool to translate from such kind of source would require some kind of smart compiler.

[jotego]

I assume that a cycle-accurate core was not available before this. Thank you for releasing it!

From the size point of view, it is a bit larger than TG68k.C but it should still fit in MiST without problems.

I'm glad you move it to github too.

Thanks a lot!

[ijor]

From the size point of view, it is a bit larger than TG68k.

It is expected to be larger. In first place because cycle accuracy takes a price, both in terms of size and performance. It requires quite some extra logic.

In second place there are several 68K features that are not implemented by TG68k, or implemented only partially. AFAIK:

- No DMA? (surprised that this seems to be not implemented!)
- No 6800 sync control (VPA/E/VMA)
- No support for signaling autovector interrupts
- AS not generated
- Originally no support at all for bus error

[jotego]

Adding all these features is also of great value.

[slingshot]

While it's bigger than the TG68k a bit (not much), it compiles faster. And didn't found any compatibility issues so far. So great CPU, I already like it.

[MasterOfGizmo]

- No DMA? (surprised that this seems to be not implemented!)

What do you mean by DMA? Or do you mean the bus arbitration? Yes that's missing in tg68k and requires us to just stall the CPU by brute force. But of course that prevents a few things like a proper tas instruction. But it's interesting how close you can get by just stopping the CPU clock externally

[ijor]

What do you mean by DMA? Or do you mean the bus arbitration? Yes that's missing in tg68k and requires us to just stall the CPU by brute force.

Yes, I meant bus arbitration. I found it surprising that's missing in TG68K because (I understand) all the other missing features are not used by the Amiga. And I thought TG68K was developed for porting Minimig, hence they didn't bother to implement those features that they didn't need. Or the Amiga doesn't use bus arbitration either?

But it's interesting how close you can get by just stopping the CPU clock externally

Yes, there are several alternatives that can used on a FPGA system because you don't really have a shared tristatable bus. The timing would be different though. Can be quite different in some cases. But you probably don't care too much if the CPU core is not cycle accurate in the first place.

[MasterOfGizmo]

This core is only a few percent bigger than tg68k and it just runs nicely. That's so cool ...

If you read my replies a few year ago when people were asking for totally accelerated 68k CPU cores i always replied that I am much more interested in a cycle exact core. And now it's there

[LaurentS]

Hi all,

I've got a Myst, but I'm not a FPGA coder.
I'm just asking myself : does this core work better than the current ST 68000 core in the myst ?
If yes, does anyone plan to make a new ST emulation with this new core ?

Best regards
Laurent

[ijor]

This core is only a few percent bigger than tg68k and it just runs nicely. That's so cool ...

Yeah. But to be fair to TK68K, I forgot that it can also be a 68020, and mine does not. TG68K would probably be smaller than it is if you remove all the 020 stuff.

I've got a Myst, but I'm not a FPGA coder.
I'm just asking myself : does this core work better than the current ST 68000 core in the myst ?
If yes, does anyone plan to make a new ST emulation with this new core ?

I plan to port FX CAST (see viewtopic.php?f=117&t=34555&start=75) to the MiST. And, of course, MasterOfGizmo is more than welcome to use FX68K on his own ST core if he wants. But there is a trade off, TG68K might be better for STeroids mode.