New production of STE 30pin simms.

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Re: New production of STE 30pin simms.

Postby joska » Tue May 23, 2017 6:07 pm

exxos wrote:Some sites listed them as FPM, some didn't. Same with some datasheets. So wasn't really sure either way, so thought I would just try them and see.


The Huyndai (?) datasheet confirms that these are FPM. I think virtually all 30 pin SIMMs have FPM-DRAMs. Also, I don't think I've ever come across a 1Mb SIMM that does not work in my STE. On the rare occasion when a SIMM does not work, it always has a sibling that does work. I.e. the non-working SIMM is broken, not incompatible with the STE.

exxos wrote:I know people have said FPM works, but the stack of them I have here didn't work. I just got all kinds of crazy on the screen and just gave up with them.


Do you happen to still have them? If so, could you list the DRAM part numbers? Maybe they were too slow?

joska wrote:That's not exactly correct. It depends on the DRAM. Generally speaking they don't do any harm, *if* the logic floats high and is stable, but its not always the case. Generally parity chips should be avoided, or the parity chip taken off, which is what I have been doing.


I'm sorry, but this does not make sense. There is nothing magical about parity. It's just a ninth bit, the value is computed by the DRAM controller if it supports parity. If not, it just does not read or write this bit. It does not affect the data bits at all.

Atari themselves shipped their STE's with parity RAM. I've got a bunch of 256KB SIMMs here from upgraded STE', all of them have parity bits.
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Re: New production of STE 30pin simms.

Postby exxos » Tue May 23, 2017 6:21 pm

joska wrote:
The Huyndai (?) datasheet confirms that these are FPM.


Yes, but I also have been looking at other brands of DRAM also. I don't remember the exacts.



joska wrote:Do you happen to still have them? If so, could you list the DRAM part numbers? Maybe they were too slow?

I still have them somewhere. 1MB, 4MB, 16MB simms. Just isn't high up on my to do list to investigate why.

joska wrote:I'm sorry, but this does not make sense. There is nothing magical about parity. It's just a ninth bit, the value is computed by the DRAM controller if it supports parity. If not, it just does not read or write this bit. It does not affect the data bits at all.


Its one of the most basic electronics fundamentals that you don't leave floating pins, its like "day 1 stuff". Even if the manufacturer says you can , I still don't recommend it.

There is no parity controller on the STE, so 9th bit isn't connected to anything at all. Its floating, which any engineer will tell you that you simply don't do that. Its bad design practices, something which I do not personally do.
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Re: New production of STE 30pin simms.

Postby joska » Tue May 23, 2017 7:49 pm

exxos wrote:Its one of the most basic electronics fundamentals that you don't leave floating pins, its like "day 1 stuff".


You also have to understand *why*. In this case it does not matter. The status of the data bus on the parity chip does not affect the circuit at all.

You can insert SIMMs with parity in your STE and run memory tests for weeks without failures. That's what matters. Most STE's has had parity SIMMs since the day they left the factory.

Of course, when you create your own SIMMs you omit parity. But there is no reason to rule out SIMMs with parity and FPM when looking for a RAM upgrade for your STE. The only thing you achieve by doing that is to make it a lot harder for yourself :)
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Re: New production of STE 30pin simms.

Postby exxos » Tue May 23, 2017 8:12 pm

joska wrote:You also have to understand *why*. In this case it does not matter. The status of the data bus on the parity chip does not affect the circuit at all.


Your missing the point still :roll:

joska wrote:You can insert SIMMs with parity in your STE and run memory tests for weeks without failures. That's what matters. Most STE's has had parity SIMMs since the day they left the factory.


Just because it works for *you* and others, does not mean its "good to do so" and isn't concrete proof that it should be done either. If Atari shipped with Parity simms, they shouldn't have, and just because Atari did it, doesn't make it "safe to do so" either. It is still bad design and shouldn't be done period, and shouldn't be done regardless of "what the word on the street" is.

The Atari ST is riddled with faults as it is, and using parity simms isn't going to help anything. Its just one in a long list of things which shouldn't be done and screw up. Running RAM test for hours isn't concrete proof either. The ST doesn't sit looping RAM constantly during normal use, other stuff uses the bus, and can cause failures. My latest DMA work exactly shows that.

I have seen simms with parity screw up on the STE and even posted about it in the past. If people want to bodge stuff its their choice. Nothing I would do. I only have been working in electronics design and repair for 20+ years , so what do I know. Frankly gets tiresome going over really basic stuff like this over and over. PSU's.. DMA.. geese,. I'm done with this thread.
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Re: New production of STE 30pin simms.

Postby Greenious » Tue May 23, 2017 9:08 pm

Before you invest heavily in this, I still got about a hundred or so 30pin simms down in the basement including a pretty nifty (and rather expensive) ram tester to verify that they are good. (and also a large amount of 72pin and SDRAMS)

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Re: New production of STE 30pin simms.

Postby joska » Tue May 23, 2017 9:08 pm

exxos wrote:Your missing the point still :roll:


No, but I think you are.

exxos wrote:Just because it works for *you* and others, does not mean its "good to do so"


So *exactly* what kind of problems does it cause? Can you be specific?

exxos wrote:It is still bad design and shouldn't be done period, and shouldn't be done regardless of "what the word on the street" is.


Again, *why* shouldn't it be done? And *why* shouldn't the data line be left floating? Why?

exxos wrote:The Atari ST is riddled with faults as it is, and using parity simms isn't going to help anything.


It's not going to hurt anything either.

exxos wrote:I have seen simms with parity screw up on the STE and even posted about it in the past.


Where? I did a search on the forum and did not find anything substantial.

exxos wrote:I only have been working in electronics design and repair for 20+ years , so what do I know.


Obviously a lot of things. But here you're wrong.

exxos wrote:Frankly gets tiresome going over really basic stuff like this over and over. PSU's.. DMA.. geese,. I'm done with this thread.


The thing is that you earn a lot of well-deserved respect here. Which is something that makes people listen to you. But in this case you're leading people on the wrong path. If people starts looking for non-FPM non-parity 30 pin SIMMs to replace their - in your opinion non-functional - SIMMs they would have to look for a looong time. Because there is no such thing.

If you're going to buy SIMMs to upgrade an STE I would actually recommend SIMMs with parity. Why? Because only the oldest SIMMs are missing parity. That means they usually have eight chips (more chips that can fail, although this is not very common), each chip using more power than the higher capacity chips on newer SIMMs with three chips.
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Re: New production of STE 30pin simms.

Postby Greenious » Tue May 23, 2017 9:58 pm

As for parity simms...

Back in the days simms were expensive and people were hunting them like mad men, and I've seen it all I think... People got sipp memories, would desolder the legs, or cut them off and stick them into their ataris and whatnot. People generally did what they "had to do"... and many were desperate for more ram and would stick anything into it.

Honestly, I have yet to see an Atari having issues with parity simms, where I with certainty can say that parity is the issue. Some cheap simms back then also used faulty drams for parity and the like. While I do agree in principle that it is wrong to leave lines floating, a correctly designed parity simm has a separate chip for parity, leaving a chip out of harms way floating generally leaves it little chance of interfering with things.

Anyway, this discussion has been had numerous times over the years, and still it comes up sometimes. Personally I got several STEs and use both parity and non-parity in them, and have yet to have any problems from it, and it's not something I walk around worrying about.

OTOH, given the choice, I wouldn't choose parity simms, but choice is also dependent on availability and price.
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Re: New production of STE 30pin simms.

Postby joska » Wed May 24, 2017 9:24 am

Greenious wrote:Some cheap simms back then also used faulty drams for parity and the like.


I've seen worse - I had a set "back in the day" that I nicked from a broken soundcard. They looked a bit odd, and upon inspection it turned out that the parity "RAM" was actually just logic that generated the parity bit from whatever was on the data bus at any given time :D I'll have a look in my stash, if I still have those I'll post a picture of them.
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Re: New production of STE 30pin simms.

Postby Greenious » Wed May 24, 2017 10:34 am

joska wrote:
Greenious wrote:Some cheap simms back then also used faulty drams for parity and the like.


I've seen worse - I had a set "back in the day" that I nicked from a broken soundcard. They looked a bit odd, and upon inspection it turned out that the parity "RAM" was actually just logic that generated the parity bit from whatever was on the data bus at any given time :D I'll have a look in my stash, if I still have those I'll post a picture of them.


Fake parity is actually even less of a concern for Ataris or any other machine that doesn't use parity, since it doesn't even connect to the lines that has Exxos worried about "floating" potentials, and it's output doesn't care if someone is listening in or not... https://en.wikipedia.org/wiki/SIMM#30-pin_SIMMs

I've used fake parity simms aswell, and infact I got a bunch of them. I would be more concerned about using (already) broken memory chips on a simm. I've seen 3chip simms using 3*4bit wide memory, but only using select bits from every dram... That is ugly...

Edit: On 3 chip simms, correctly designed, removing the parity is not difficult if you really want to and it worries you. It's the rightmost chip, just cut the legs and throw it away. Just make sure you didn't short the remains.
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Re: New production of STE 30pin simms.

Postby dhedberg » Wed May 24, 2017 11:00 am

Greenious wrote:I've used fake parity simms aswell, and infact I got a bunch of them. I would be more concerned about using (already) broken memory chips on a simm. I've seen 3chip simms using 3*4bit wide memory, but only using select bits from every dram... That is ugly...

Just curious, why is that considered ugly? Wouldn't it be a rational decision if it was cheaper to produce?
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Re: New production of STE 30pin simms.

Postby Greenious » Wed May 24, 2017 11:14 am

dhedberg wrote:
Greenious wrote:I've used fake parity simms aswell, and infact I got a bunch of them. I would be more concerned about using (already) broken memory chips on a simm. I've seen 3chip simms using 3*4bit wide memory, but only using select bits from every dram... That is ugly...

Just curious, why is that considered ugly? Wouldn't it be a rational decision if it was cheaper to produce?


It is both rational and when done at manufacturer level, perfectly ok. The practice is common in a lot of IC's, especially CPU's back then, where parts that failed tests (like FPU/MMU etc) were simply disabled and they sold them without these functions. But then they still tested them rigorously, and had correct methods of shutting down the bad parts of the chip. And they had high standards too, since these chips still were overclockable etc

But the risk that you are getting substandard memory is a lot higher, especially if the memory is a noname brand from china, since it usually was broken simms/dram they simply recycled and did not test properly. If the chip markings say it's 4bit wide but only 2 or 3 bits is used, you can be sure this has not been done on manufacturer level, and your memory is a ticking timebomb.
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