exxos wrote:I never got a PicoPSU to work, I went though a few of them, gave up in the end. Would be interesting to know what the regulation is like on them (if you have a scope) and also report back if the white border dims while the floppy heads are moving.
ijor wrote:IMHO the DMA chip is, by far, the worse design on the ST chipset. Because the ACSI bus is asynchronous (no clock on the bus), the chip seems designed with the goal to be as much independent on the ST clock as possible. The chip then uses a lot of async and ripple techniques. At the day it wasn't probably unheard. But today we know these techniques are calling for trouble.
AtariZoll wrote:Ijor, what you saying explains not why it was OK in ST machines, and suddenly became troublesome in STE.
I don't think that ACSI bus needs clock.
DMA chip IMHO is very good design
Of course, this days, when machines are very old there are diverse problems with it. Probably mostly power related.
troed wrote:I think it might be a red herring to focus on power issues as an explanation. My floppy-DMA problems with the -38 DMA were _after_ having switched out the internal PSU for an 80W picoPSU.
(Sorry for bringing this up over and over but I think it's important)
ijor wrote:I didn't say ACSI needs a clock, did I? I actually didn't say that anything in ACSI is inherently bad. I was only talking about the internal design of the chip.
Have you seen the internal logic of the chip? Because that's what I'm talking about.
ChrisTG wrote:Btw, the "1v pulses" are crosstalk from a nearby line while the particular line is in "floating" state. So just another indication for a bad circuit design concerning the DMA stuff.
exxos wrote:Yep , I really wish the internals of the ST chips were published, it would make life so much easier.
ChrisTG wrote:exxos wrote:Yep , I really wish the internals of the ST chips were published, it would make life so much easier.
Yes indeed, it would a lot.
ijor wrote:I did partial reverse engineering of most of the chipset internals. Already published internal schematics of the whole atari 8-bit chipset a few years ago. For the ST, I was waiting to finish the job before publishing. Unfortunately, I never had the time. And since then I was away from Atari for a few years.
Guess I should find the time to perform a minimal clean up and publish what I have at the state it is, never mind it is not complete. Sad to hear that we still don't get original Atari work (not reverse engineered). I am aware at least about two people that have something original, not sure exactly what ( schematics, layout, or what).
ijor wrote:I did partial reverse engineering of most of the chipset internals.
exxos wrote:If anyone has some documentation as to where Atari said about this "Bad DMA chip" then please post it here. This "bad DMA chip" myth must have started somewhere. Though until someone can provide me with a "buggy DMA" I class this case as closed, that the "bad DMA" is a myth. Of course the -38 DMA had been used in the STFM for many years. So unless there was some bad batch of DMA chips then there should be no reason why the -38 shouldn't work in the STE's. Works perfectly in all my STE's.
Certainly, Atari were quoted in the press at the time attributing the fault to the DMA chip (see the attached bit from ST Format Issue 19). I suffered with a bad DMA in my STe and had to have it replaced in 1996 when we got a HDD (you can read the details in an 'Atari Computing' article I wrote) but before it was fine with floppies (that machine got absolutely hammered back then ). Soon after getting the HDD, I started to get intermittent data corruption…
After I'd had the chip replaced, the machine (and hard drive) were fine for the next two years or so before I moved to a PC.
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