68020 booster

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rpineau
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Re: 68020 booster

Postby rpineau » Mon Aug 10, 2015 2:41 pm

I have this currently :

!BG00 = !BG20 & AS20;

which comes from Motorolla application note.. Also this is for the /BG output. The issue I see is on the /BG pin connected to the motherboard /BG EVEN if I don't connect it to the ATF (I have a jumper to switch between connecting it to the CPU directly or to the ATF). So there is something weird going on just on that pin coming from the mother board.
I'll change the BG code to the one we have on the V2.
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Re: 68020 booster

Postby rpineau » Mon Aug 10, 2015 3:04 pm

@ctirad.
I took trace of the standard 68000 in the MegaSTE and both /UDS and /LDS are asserted at the same time as /AS (which is expected of the 68000). If delays are needed they are probably done inside the GLUE. The machine starts but does seem to crash after 7 to 9 seconds before even displaying anything (I'm using a flat panel in monochrome mode). On the MegaSTE these signals go through a 74F244 so that they can be isolated from the rest of the machine when the cache is accessed... so that's at most 7 ns delay.. which is already what the ATF1504 I'm using is rated for. OF course this is not 7 ns between the /ST_AS on my CPLD and /LDS, /UDS so if needed I can run them though an extra gate inside. But I'm not sure this will change anything.
The big issue right now is really figuring out why the /BG pin from the mother board is "following" /DTACK (which is the signal it matches so far ).

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Re: 68020 booster

Postby alanh » Mon Aug 10, 2015 6:28 pm

/UDS & /LDS are asserted at the same time as /AS for a read operation, but not a write operation.
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Re: 68020 booster

Postby rpineau » Mon Aug 10, 2015 8:28 pm

True... I forgot that on write they are asserted on S4 as data is driven on the bus during S3. So now the Motorola AN944 doesn't really say anything about this and has the following equation for LDS and UDS :

Code: Select all

!UDS = !DS20 & !DS20_1 & !A0;
UDS.oe = HIGHZ;
!LDS = !DS20 & !DS20_1 & SIZ1
      # !DS20 & !DS20_1 & !SIZ0
      # !DS20 & !DS20_1 & A0;
LDS.oe = HIGHZ;

DS20_1 is the output of a flip-flop to align the timing to the 68000 S2 ... but not S4 for a write.. so looks like more issue with the AN944...
So now I need to figure out how to add R/W to this to get the extra 1 clock delay (to get to S4) on write.

Thanks Alan for the tip.
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Re: 68020 booster

Postby rpineau » Mon Aug 10, 2015 8:33 pm

Ok, I just checked the 68020 UM, and /DS is also delayed on write so UDS and LDS will be properly delayed and match the 68000 write cycle. But thank for correcting me.
Now I still need to find where the /BG issue comes from.

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Re: 68020 booster

Postby rpineau » Sat Aug 22, 2015 10:23 pm

I have finally received the 2 PLCC68 plug so I can assemble the 2 other board... hopefully this weekend.. if not.. next weekend.
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Re: 68020 booster

Postby rpineau » Thu Sep 10, 2015 9:44 pm

So before assembling the other board I'm going to spend a little bit more time on the current one as the issues I see (see http://www.exxoshost.co.uk/atari/last/020BOOSTER/ update) might require a new board to fix them.
I might also try to find a STE and put a TOS 2.06 on it for testing as the MegaSTE might behave differently in term of signal quality.
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Re: 68020 booster

Postby exxos » Fri Sep 11, 2015 10:22 am

Welcome to crazy town ;)
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Re: 68020 booster

Postby frank.lukas » Fri Sep 11, 2015 11:31 am

rpineau wrote:I might also try to find a STE and put a TOS 2.06 on it for testing as the MegaSTE might behave differently in term of signal quality


I think it is easier to develop the whole thing on a simple normal Atari ST (with TOS 2.06) and than bring it to a Mega STE ...
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Re: 68020 booster

Postby rpineau » Sat Oct 17, 2015 8:47 pm

Quick update :
I have been very busy with work and other project in the last 4 weeks so the only thing I manage to do is to build a 2nd card and send it to someone who contacted me and want to help (he got all the tools needed for this). I added a pull-up on A0 (was missing) and on the CPU /BG. I also added 2 electrolytic capacitor (33uF each) on the 5V line.
I haven't yet tested this to see if it helps with the weird things we were seeing on some signals.

You can also blame the Rugby world cup for my lack of time spent on this :)

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Re: 68020 booster

Postby rpineau » Sat Nov 07, 2015 5:21 pm

Quick update : Some tests have been done on a STE and we see a white screen with 20 bombs. So we have almost the same behavior on the STE and MegaSTE. So this is progress in some way.
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Re: 68020 booster

Postby paul92706 » Sat Nov 07, 2015 6:39 pm

rpineau wrote:Ok, I just checked the 68020 UM, and /DS is also delayed on write so UDS and LDS will be properly delayed and match the 68000 write cycle. But thank for correcting me.
Now I still need to find where the /BG issue comes from.

Rodolphe

Hi Rodolphe, i got a question, Do you use the flipflops to delay the timming for those signals?
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Re: 68020 booster

Postby rpineau » Sat Nov 07, 2015 7:03 pm

yes
We use the system clock to drive the flipflop to delay the needed signals so that the 020 /AS is asserted on the 68000 S2 (instead of the 68020 S1).
We also OR the resulting signal with the 020 /AS so that it goes back up at the edge of S7 :
AS20_1.ck = sys_clk;
AS20_1.d = AS20;

AS00 = AS20_1 # AS20;
AS00.oe = HIGHZ;


We have something similar for the 020 /DS signal that us used to generate /LDS and /UDS.
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Re: 68020 booster

Postby rpineau » Sat Nov 07, 2015 7:08 pm

If more people want to help I have enough part to build a 3rd board. I would provide the board for free but you need to get the JTAG programmer for the CPLD we're using (ATF1504 in the dev version, it's the same programmer for the whole ATF1500 family).
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Re: 68020 booster

Postby paul92706 » Mon Nov 09, 2015 3:25 am

rpineau wrote:If more people want to help I have enough part to build a 3rd board. I would provide the board for free but you need to get the JTAG programmer for the CPLD we're using (ATF1504 in the dev version, it's the same programmer for the whole ATF1500 family).
Rodolphe

Hi rodolphe, i would like to help :D i have a jtag for programming the cpld, is a Mega STE required for this project?
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Re: 68020 booster

Postby rpineau » Tue Nov 10, 2015 12:12 am

A STE can work too as long as it has a TOS 2.06.
The Atmel tool only support their own JTAG programmer (unfortunately).
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Re: 68020 booster

Postby rpineau » Mon Nov 23, 2015 8:44 pm

Today we had a breakthrough.
Even though we still see some issues with the Atmel ATF series (issues with the output enabled of some output when using combinatory equation for these) we got a working proto. All of this thanks to Juliusz who found most of the problem I had (mostly related to the OE issue).
He was able to get it working on a STE with TOS 2.06.
Here are a few perf he got from Gembench running the 68020 at 8MHz:

========================================
Results (I had blitter on, reference is STE with blitter):
Display 95%
CPU 164%
Average 113%
Integer: 284% !!
VDI graphics: 126%
RAM access: 131%
ROM access: 151%
All other are about 90-100%

With blitter off, reference: STE with blitter off:
Display 116%
CPU 165%
Average 129%
Integer div: 285%
VDI graphics: 132%
RAM: 131%
ROM: 152%
Blitting: 151%
All other slightly above 100%
Float: 93%
VDI Enquire: 91%
========================================

Now that we have a working version of the code (and a few hardware fixes to go with it) we can move forward and start trying the 33MHz switching on /AS (same as the 68000 booster from exxos).

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Re: 68020 booster

Postby frank.lukas » Mon Nov 23, 2015 9:43 pm

... very beautiful ;-)))

I'm waiting for a version for the normal Atari ST.
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Re: 68020 booster

Postby exxos » Mon Nov 23, 2015 10:31 pm

frank.lukas wrote:... very beautiful ;-)))

I'm waiting for a version for the normal Atari ST.


I'm waiting for the 32mhz 68000 & 020 version ;)
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Re: 68020 booster

Postby MasterOfGizmo » Tue Nov 24, 2015 7:59 am

I found this image in another forum. Seems to be exactly what you guys are doing here.

http://www.webmaster-imho.de/wp-content ... m68020.png
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Re: 68020 booster

Postby rpineau » Tue Nov 24, 2015 6:59 pm

@MasterOfGizmo , yes it does look very similar. We have an expansion port on our card and also plan on having it run at 33MHz (either all the time or during non ST bus access). They did a good job of getting everything in 1 logic chip and a GAL.
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Re: 68020 booster

Postby rpineau » Tue Nov 24, 2015 7:28 pm

Our test were done on a STE with a TOS 2.06. Today Juliusz tested on his MegaSTE. It kind of works... if you disable the MegaSTE cache. If the cache is enabled .. bombs..
So we have more work to do :) but there is progress.
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Re: 68020 booster

Postby frank.lukas » Sat Nov 28, 2015 12:43 pm

The PAK68/3 work also with the Mega STE, but the MSTE Cache must be always switch off ...
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Re: 68020 booster

Postby rpineau » Sat Nov 28, 2015 6:41 pm

Sounds like there is something particular about the cache management then.
Thanks for the info.
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Re: 68020 booster

Postby arf » Sat Nov 28, 2015 9:51 pm

MasterOfGizmo wrote:I found this image in another forum. Seems to be exactly what you guys are doing here.

http://www.webmaster-imho.de/wp-content ... m68020.png


That is the Janus 020 board, a ST-on-a-ISA-card for Intel PCs. See the article here http://www.webmaster-imho.de/offtopic/atari-emulator-janus-020/.

Drivers are available: http://blog.hoffart.de/2008/01/18/treiber-fur-janus-karte-der-atari-im-pc-lebt/


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