Memory access time

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Re: Memory access time

Postby AtariZoll » Thu Aug 07, 2014 3:55 pm

[quote="calimero"
and what about MegaSTe - it can read/write ~7MB/s to ST Ram? If this is true, than it must have double speed memory (around 60-70ns?)?[/quote]

ST RAM in Mega STE is of same speed as in any ST. What may fool some test SW is 16KB cache when CPU works at 16 MHz. Reading writing RAM is not faster. Only that CPU can work faster - because most of code has cycles, loops, and then CPU will access mostly 2x faster cache. 16KB is pretty much for 68000 ASM code.
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Re: Memory access time

Postby troed » Thu Aug 07, 2014 5:02 pm

calimero wrote:"The SHIFTER contains 4 16-bit registers RR1 to RR4" - so it is not 4 bytes but 4 word buffers (registers).


Sorry, yes. I'm still actively researching it for the writeup at http://atari-forum.com/wiki/index.php?t ... _Scanlines that I didn't even notice you wrote 'bytes' :) 4 16 bit words is why 16 pixels of four bitplane graphics is output at a time.

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Re: Memory access time

Postby mc6809e » Thu Aug 07, 2014 6:25 pm

npomarede wrote:
mc6809e wrote:What about the case where two planes are modified? Sequential access lets you do long writes to modify two planes. That's a win.

A one color sprite just doesn't seem worth the effort, but a three color sprite is much more useful.

Besides, so little data is moved in the one color case that the slowdown seems acceptable compared to the boost in the three color case where more data must be moved.


As long as you still need to skip interleaved words with "addq #nn,ax" and you can't use movem to copy a large sprite or similar of more than 16 pixels, then I wouldn't call the possibility to use "move.l" a win, maybe just a smaller loss :)


Why use addq when using move.l rx, d(An) is faster?

I think that gives the advantage to the interleaved case for the 32 pixel wide three color sprite -- a reasonably sized object on a screen that's 320 pixels wide.

Another issue is masking. The interleaved case allows the programmer to use a single 32-bit value to mask two planes in one operation. The non-interleaved case forces two 16-bit masking operations to be performed. (Edit: for sprites where masking only happens on the edges. No advantage for sprites with interior "holes")

What probably is ideal for a 68000 with 16 color display and no other hardware assistance is a combination of two separate planes each with two interleaved bitplanes. That would also allow for some nice parallax duel-playfield type effects.

It would appear crazy the first time programmers saw it, though.

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Re: Memory access time

Postby npomarede » Thu Aug 07, 2014 6:57 pm

mc6809e wrote:Why use addq when using move.l rx, d(An) is faster?

that was just an example ; d(An) is limited to -127 / +128 offset, so it will not work in all scenario. And my point remains, you can't benefit of movem with interleaved bitmap when you just want to modify <= 3 bitplanes.
I think that gives the advantage to the interleaved case for the 32 pixel wide three color sprite -- a reasonably sized object on a screen that's 320 pixels wide.

A 32 pixel wide sprite wil not always uses only 1 long, most of the time it will be split on 2 longs, because the sprite is not always on a 16 pixel multiple X position.
And even so, a 32 pixel sprite will be be displayed on 2 or 3 different bitplane words, so here again you need to use addq or offset addressing mode to skip the unused bitplane, which will always be slower than if all pixels of the same bitplanes were in a consecutive (not interleaved) memory region.
Another issue is masking. The interleaved case allows the programmer to use a single 32-bit value to mask two planes in one operation. The non-interleaved case forces two 16-bit masking operations to be performed. (Edit: for sprites where masking only happens on the edges. No advantage for sprites with interior "holes")

Yes, there can be some situation where interleaved could help, but not many :)
What probably is ideal for a 68000 with 16 color display and no other hardware assistance is a combination of two separate planes each with two interleaved bitplanes. That would also allow for some nice parallax duel-playfield type effects.

It would appear crazy the first time programmers saw it, though.

Here also for a 2 bitplane parallax scrolling, interleaved bitplanes is a huge slowdown. Most of the time the parallax background will be preshifted for different speeds (for example 4 pixels per VBL), so the best would be to copy directly those 2 preshifted bitplanes in their corresponding destination using movem. With separated planes, you will get the maximum speed possible from the cpu, with interleaved bitplanes, you will copy 2 planes in one long, skip one long, copy 2 planes, ... and so on. That's really less efficient.

Really, having coded a lot of demo effects both on ST and Amiga, I don't see many cases were interleaved bitplanes give an advantage.

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Re: Memory access time

Postby mc6809e » Thu Aug 07, 2014 7:17 pm

npomarede wrote:Really, having coded a lot of demo effects both on ST and Amiga, I don't see many cases were interleaved bitplanes give an advantage.


Fair enough. I'll take your word for it.

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Re: Memory access time

Postby AdamK » Thu Aug 07, 2014 7:36 pm

I have ST with ALT-RAM board by alanh. I'd like to test how fast it is, compared to ST-RAM. Where can I find benchmark that will do that on ST?
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Re: Memory access time

Postby Cyprian » Thu Aug 07, 2014 9:16 pm

AtariZoll wrote:That's the problem. ST at 8 MHz has 4 MB/sec read or write speed with ST RAM . It is result of using half of it's 250 nS cycle 16-bit RAM bandwith , what is 8 MB/sec. So, TT's double speed is just result of 32-bit bus. CPU is clocked 4 times faster, so there is plenty of wait states when accessing ST RAM .

this exactly coincides with my observations

AtariZoll wrote:Btw. this perfectly answers my observation "it seems not faster at all than on Falcon" - when I ran Microprose F1 GP for the first time on TT . Since it uses pretty advanced 3D code, CPU cache just has too many misses (too short for complex code), so faster CPU is lost in many waits.

it could be also caused by one nice Falcon's feature - 16bit bus. Which makes Word memory operations as fast as Longword , in opposite to TT (and also A1200/A3000/A4000) where Word memory operations should be twice slower that Longword memory operations.

I somewhere read that Funnel chip, during read memory access, works from the CPU point of view as a small 64bit cache. Theoretically it should improve a read memory process, but should has no impact on the CPU write memory.


mc6809e wrote:
npomarede wrote:Really, having coded a lot of demo effects both on ST and Amiga, I don't see many cases were interleaved bitplanes give an advantage.


Fair enough. I'll take your word for it.


interesting point.
I think that in case of system graphics manipulations (e.g. GEM apps, VDI/AES ect), interleave bitplanes are really big advantages, due to that with one move.l (and also and.l / or.l) we have access to two bitplanes at once, and with (An)+ access to next two bitplanes. But in case of specific types of games with e.g. parallax scrolling, Amiga's bitplanes are better.
It looks like creators of both machines took different aim during designing them - faster OS graphics operations vs faster gaming graphics operations.
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Re: Memory access time

Postby Dio » Thu Aug 07, 2014 9:42 pm

mc6809e wrote:
npomarede wrote:Really, having coded a lot of demo effects both on ST and Amiga, I don't see many cases were interleaved bitplanes give an advantage.
Fair enough. I'll take your word for it.

Fundamentally bitplanes are mostly a crappy idea, especially if:
- all your modes are power-of-2 bits per pixel
- games are a fundamental target of the machine
- most of the graphics work is done in software
Oh, look what that describes.

Using chunky pixels wouldn't have increased hardware costs. In fact, even having both probably wouldn't, since it could have been handled with a simple mux at the point where the shift registers are updated from the staging registers.

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Re: Memory access time

Postby calimero » Thu Aug 07, 2014 11:02 pm

Dio wrote:Fundamentally bitplanes are mostly a crappy idea, especially if:
- all your modes are power-of-2 bits per pixel
- games are a fundamental target of the machine
- most of the graphics work is done in software
Oh, look what that describes.

describes what?
on ST games was not "fundamental target of the machine" but I assume that you thinking on ST anyway ;)

Dio wrote:Using chunky pixels wouldn't have increased hardware costs. In fact, even having both probably wouldn't, since it could have been handled with a simple mux at the point where the shift registers are updated from the staging registers.

but how would you store 9bit chunk pixels in RAM?
(9bit because ST have 512 color pallete in RAM) one word per pixel?!
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Re: Memory access time

Postby mc6809e » Fri Aug 08, 2014 4:25 am

Dio wrote:Fundamentally bitplanes are mostly a crappy idea, especially if:
- all your modes are power-of-2 bits per pixel
- games are a fundamental target of the machine
- most of the graphics work is done in software
Oh, look what that describes.

Using chunky pixels wouldn't have increased hardware costs. In fact, even having both probably wouldn't, since it could have been handled with a simple mux at the point where the shift registers are updated from the staging registers.


Thinking about it, chunky alone might have been cheaper and easier since it saves six 16-bit latches. At any one instant you only really need the current word being fetched, the previous word that's being shifted, and a chunk of the previous word to index the palette.

Maybe they used bitplanes because the ST was built to compete with the Amiga so someone said "well the Amiga uses bitplanes so we should, too" and then they ran out of chip real estate and couldn't give each plane it's own base address negating most of bitplanes' advantage.

That's possible I guess.

Bitplanes seem to work out well on the Amiga, though, at least for anything less than 8-bit color, perhaps because such an arrangement simplifies the blitter. Once you build a blitter that can handle a single plane of bits, using it on additional planes is easy.

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Re: Memory access time

Postby calimero » Fri Aug 08, 2014 6:20 am

^
Send email to Shiraz and ask him! ;)

...somebody should really organize interview with him.
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Re: Memory access time

Postby Cyprian » Fri Aug 08, 2014 7:09 am

mc6809e wrote:Maybe they used bitplanes because the ST was built to compete with the Amiga so someone said "well the Amiga uses bitplanes so we should, too" and then they ran out of chip real estate and couldn't give each plane it's own base address negating most of bitplanes' advantage.

That's possible I guess.


actually, bitplanes were present on PC market before the Amiga. E.g. in EGA video cards which were released 1984.
ST was build as Apple Macintosh competitor and not Amiga . in 1983/84 the ST designers rather they had no idea about Amiga and its hardware details.
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Re: Memory access time

Postby AtariZoll » Fri Aug 08, 2014 7:13 am

calimero wrote:...
but how would you store 9bit chunk pixels in RAM?
(9bit because ST have 512 color pallete in RAM) one word per pixel?!


If it is 9 bit, then is always padded to whole bytes, so would pad to 16 bits. Of course, that would be total nonsense to use only 9-bit color data then. In reality, you have it in Falcon, with it's so called True Color mode - 1 pixel takes 2 bytes, and can have any of 65536 colors.

In case of ST, they did not make even much shorter 8 bits per pixel, palette based mode, what would allow 256 colors at once - it came first on TT. Because then whole concept of sharing RAM access between video and CPU would need 2x faster RAM. Another problem would be slower screen update in games, although for adventures it would be ideal.
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Re: Memory access time

Postby Dio » Fri Aug 08, 2014 9:19 am

mc6809e wrote:Thinking about it, chunky alone might have been cheaper and easier since it saves six 16-bit latches. At any one instant you only really need the current word being fetched, the previous word that's being shifted, and a chunk of the previous word to index the palette.

Very good point (and it saves more than that, since it saves 3 cheap latches and 3 shift registers - although actually shift registers are cheap if done with dynamic NMOS, which I presume they were in the ST). Clock the shift regs at 32MHz always and latch the bottom 4 bits every 1, 2 or 4 clocks depending on the video mode.

calimero - by chunky, I wasn't proposing palette sized (note my comment on power-of-two above). Also, gaming was obviously one of the main targets of the ST - not the only one, but it was an important consideration in the design of all home computers of the time. I mean, you wouldn't have put joystick ports on the thing otherwise. Compare the Mac, which didn't target the games market and therefore didn't make it as a home computer for 10+ years.

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Re: Memory access time

Postby Dio » Fri Aug 08, 2014 9:24 am

AtariZoll wrote:In case of ST, they did not make even much shorter 8 bits per pixel, palette based mode, what would allow 256 colors at once - it came first on TT. Because then whole concept of sharing RAM access between video and CPU would need 2x faster RAM. Another problem would be slower screen update in games, although for adventures it would be ideal.

A 32-bit RAM bus would have been the other option, with the 64MB video memory an option only enabled on the 1040 STs. That wouldn't have added a large cost (slightly more complex routing, doubling the size of the bus gateway, a 68-pin PLCC for the Shifter). Most problematic might have been 16x the SRAM for the palette entries, plus they'd have had to go to 4 bits per channel not to look silly - that would have well over doubled the cost of the Shifter.

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Re: Memory access time

Postby Frank B » Fri Aug 08, 2014 3:30 pm

mc6809e wrote:
Dio wrote:Maybe they used bitplanes because the ST was built to compete with the Amiga so someone said "well the Amiga uses bitplanes so we should, too" and then they ran out of chip real estate and couldn't give each plane it's own base address negating most of bitplanes' advantage.

That's possible I guess.

Bitplanes seem to work out well on the Amiga, though, at least for anything less than 8-bit color, perhaps because such an arrangement simplifies the blitter. Once you build a blitter that can handle a single plane of bits, using it on additional planes is easy.


Maybe they had to do it that way due to patent issues?

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Re: Memory access time

Postby AtariZoll » Fri Aug 08, 2014 3:35 pm

Dio wrote:A 32-bit RAM bus would have been the other option, with the 64MB video memory an option only enabled on the 1040 STs. That wouldn't have added a large cost (slightly more complex routing, doubling the size of the bus gateway, a 68-pin PLCC for the Shifter). Most problematic might have been 16x the SRAM for the palette entries, plus they'd have had to go to 4 bits per channel not to look silly - that would have well over doubled the cost of the Shifter.

32-bit RAM in 1985 would cost a lot. It would increase price of machine at least 300-400 $ . It means 32 RAM chips instead 16, bigger and more complex PCB, then more pins on shifter, MMU, + logic to multiplex it on 16-bit CPU bus - some plus 74LSxxx chips too .
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Re: Memory access time

Postby mc6809e » Mon Aug 11, 2014 6:29 pm

Cyprian wrote:ST was build as Apple Macintosh competitor and not Amiga . in 1983/84 the ST designers rather they had no idea about Amiga and its hardware details.


I think your timeline is off.

dadhacker who worked on the ST project relates that in July 1984, when Jack Tramiel took over Atari, that engineers were asked questions concerning the development of a new 16-bit machine which would become the ST. The schedule for the ST project called for development of a prototype to begin in August 1984 and to be available for CES in January of 1985.

An Amiga prototype had already been shown at the Consumer Electronics Show in January 4th, 1984. COMPUTE! magazine had an article on it. It was very public. Jack Tramiel certainly knew of it. It's likely that the Atari team also knew of it. Tramiel having just left Commodore also knew that Commodore intended for the Amiga to be its 16-bit machine.

The Macintosh was expensive and catered to a certain group of consumers willing to spend a lot of money on a computer.

The ST was intended to be a no-frills budget machine. The audience for it was very different than that of the Macintosh.

And the evidence (and Jack Tramiel's character) suggests to me that the ST was designed to compete directly with Commodore's machine and to undercut it with aggressive pricing and a slightly earlier release.

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Re: Memory access time

Postby Hippy Dave » Mon Aug 11, 2014 7:32 pm

The Apple Macintosh was an expensive, no frills machine. The ST was a relatively inexpensive, no frills machine. The Amiga was supposed to be a fantastic whiz-bang audio/video/toaster... but the ST had MIDI. Take your pick. I chose Atari because it had the Alcyon C compiler and the MC68000.

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Re: Memory access time

Postby Cyprian » Mon Aug 11, 2014 8:19 pm

mc6809e wrote:
Cyprian wrote:ST was build as Apple Macintosh competitor and not Amiga . in 1983/84 the ST designers rather they had no idea about Amiga and its hardware details.


I think your timeline is off.

dadhacker who worked on the ST project relates that in July 1984, when Jack Tramiel took over Atari, that engineers were asked questions concerning the development of a new 16-bit machine which would become the ST. The schedule for the ST project called for development of a prototype to begin in August 1984 and to be available for CES in January of 1985.

An Amiga prototype had already been shown at the Consumer Electronics Show in January 4th, 1984. COMPUTE! magazine had an article on it. It was very public. Jack Tramiel certainly knew of it. It's likely that the Atari team also knew of it. Tramiel having just left Commodore also knew that Commodore intended for the Amiga to be its 16-bit machine.

The Macintosh was expensive and catered to a certain group of consumers willing to spend a lot of money on a computer.

The ST was intended to be a no-frills budget machine. The audience for it was very different than that of the Macintosh.

And the evidence (and Jack Tramiel's character) suggests to me that the ST was designed to compete directly with Commodore's machine and to undercut it with aggressive pricing and a slightly earlier release.


we don't know what exactly Tramiel's knew about Lorraine, also we don't know what level of Lorraine's hardware details were available at this time.
But we know that ST was called Jackintosh, Apple Lisa (which has the same CPU and similar GUI to Mac and ST) was used during ST development, and ST has:
- GUI which looks like Macintosh;
- very similar (but a bit better) mono screen resolution to Macintosh;
- the same 68000 8Mhz CPU like Macintosh ;
all of that for much lower price than Macintosh, just "Power without the Price" - https://www.youtube.com/watch?v=ZBgC3HMK20A
Also hard disk/Midi support positioned ST in similar market as Macintosh (home power users / pro users)

Regarding Amiga vs Atari, can see that both machines represents different ideas: game console vs power machine.
Both computer has no any common feature, which in my opinion, competitors should have.

Of course after 1987, market showed that those both machines were competitors.
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Re: Memory access time

Postby calimero » Mon Aug 11, 2014 9:45 pm

I think that Commodore did not have a clue what to do in 16bit world!

And I can bet that Jack Tramiel left Commodore because of this: Commodore made bunch of useless 8bit computers after C64 instead to focus on next 16bit RBP (rock bottom price) computer (which ST essentially was!). ST was most affordable, yet useful 16bit computer (in my opinion far better designed than Mac).

and Amiga was saviour for Commodore - otherwise they will go bust!
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Re: Memory access time

Postby Dio » Sun Aug 17, 2014 4:14 am

Cyprian wrote:Regarding Amiga vs Atari, can see that both machines represents different ideas: game console vs power machine.
Both computer has no any common feature, which in my opinion, competitors should have.

This is looking at it with either A. the glasses of today or B. those of the hardware designer. That's absolutely not the way the consumer was likely to look at it.

Compare the two from the point of view of a consumer in 1985/6:
- 68000 CPU
- 512K RAM on the 'consumer' machine
- Built in 3.5" floppy
- Mouse
- WIMP desktop GUI
- "Professional" keyboard
- TV or monitor support at similar resolutions (if not colour depths)
- Almost identical games support
- Similar suite of 'pro' applications
- Printer ports, serial ports, etc.

The similarities between the two are far larger than their differences, especially when you consider that the lower spec of the PC effectively set the spec of the Amiga games. And all those are huge changes, especially in Europe where 8-bit machines hadn't been so extensively upgraded with 80-column displays and floppy drives and modems the way that C64s and Apple IIs had in the US. Hence why the ST demolished the Amiga in Europe early doors - due to the common feature set of both being better than what the market was used to, and the market more price sensitive) but didn't do too well in the US (where 8-bits already had more of the features, and so the enhanced graphics capabilities were more important).

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Re: Memory access time

Postby Dio » Sun Aug 17, 2014 4:36 am

AtariZoll wrote:
Dio wrote:A 32-bit RAM bus would have been the other option, with the 64MB video memory an option only enabled on the 1040 STs. That wouldn't have added a large cost (slightly more complex routing, doubling the size of the bus gateway, a 68-pin PLCC for the Shifter). Most problematic might have been 16x the SRAM for the palette entries, plus they'd have had to go to 4 bits per channel not to look silly - that would have well over doubled the cost of the Shifter.

32-bit RAM in 1985 would cost a lot. It would increase price of machine at least 300-400 $ . It means 32 RAM chips instead 16, bigger and more complex PCB, then more pins on shifter, MMU, + logic to multiplex it on 16-bit CPU bus - some plus 74LSxxx chips too .

This would only apply to the 1040, which already had 32 DRAM chips. Three pins are needed on the MMU but it might be as few as one since the gateway chips have multiple OEs. Yes, you need four more LS chips (or a PAL) for the bus gateway - you don't need a multiplexer, since the gateway itself handles that; the CPU side of the gateway would simply be 16-bit, with the shifter side of it 32-bit - a PLCC shifter, more complex routing. I would estimate cost as $10 or less for that. It might have been $2.

The much bigger uncertainty is the cost of the additional logic inside the shifter and if it was actually buildable. I have no read on that cost; it could easily be much more than the rest. A 256-entry palette would be a mental thing to prototype in wirewrap the way they did the ST Shifter

And, of course, even though these features would only help the 1040, the cost would be borne on the 520 as well.

It's all very speculative. But really, $300 is way off.

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Re: Memory access time

Postby retrorogue » Fri Sep 26, 2014 8:55 pm

mc6809e wrote:I think your timeline is off.


Actually your timeline and history is a little off in parts as well.

dadhacker who worked on the ST project relates that in July 1984, when Jack Tramiel took over Atari, that engineers were asked questions concerning the development of a new 16-bit machine which would become the ST. The schedule for the ST project called for development of a prototype to begin in August 1984 and to be available for CES in January of 1985.


You're reading way too much into that. First, Jack didn't "take over Atari." It was an assets purchase of Atari Inc.'s Consumer Division. Assets purchases entail purchasing IP, facilities and the like, not people. People are usually hired over to the new company to maintain the assets. Jack's Atari Corp. was an entirely new company. Atari Inc. itself was immediately renamed to Atari Games Corp. and then whittled down to just the Coin Division at which point it had majority interest sold to NAMCO and was renamed Atari Games Corp.

Secondly, as stated they were hiring over people to maintain the purchased assets and work on the planned new products such as RBP. Not to first design RBP itself. RBP was already designed and ready to go into wire wrap stage at the time of the purchase. It was delayed to August because of Commodore's injunctions filed against Shiraz Shivji and the two other former Commodore engineers, which prohibited them working on any computers for Jack for July.

An Amiga prototype had already been shown at the Consumer Electronics Show in January 4th, 1984. COMPUTE! magazine had an article on it. It was very public. Jack Tramiel certainly knew of it. It's likely that the Atari team also knew of it.


Atari Inc. was already in negotiations in late '83 for access to the Amiga technology for use in it's coin-ops and a game console. What Atari Inc. did had zero bearing on Jack's Atari Corp. though, he didn't even care about Atari Inc.'s own 68000 based computer projects. RBP was already in place before the purchase and he wanted to hit the ground running..

Likewise, Lorraine was a hardware prototype and of a far different nature than the actual computer Amiga released several years later. Different hardware and none of the operating system or software that would later be pushed in the redesign under Commodore. In fact, as David Morse testified in court, they couldn't get Lorraine to work right and wound up dismantling it July and starting over.

Tramiel having just left Commodore also knew that Commodore intended for the Amiga to be its 16-bit machine.


Way off on that timeline. Commodore and Amiga didn't even begin to approach each other until June '84. There was nothing for him to "know about" when he left in January.

And the evidence (and Jack Tramiel's character) suggests to me that the ST was designed to compete directly with Commodore's machine and to undercut it with aggressive pricing and a slightly earlier release.


No, it was built to compete against the Japanese threat Jack felt was imminent in the personal computer industry. His fetish with the Japanese and their prospective competition is well documented and goes back to Commodore's days in the calculator industry when the Japanese came in and took everything over with cheaper and better performing products. Jack actually retired immediately that January '84 and went on a world trip with his wife. By early spring however, seeing momentum pick up with the Japanese and their intention to enter the world market with MSX based computers (potentially taking over the 8-bit market), he felt the other computer companies such as Apple weren't in a position to fight them off. So he felt he needed to come back and preemptively strike with a low cost high powered computer. There's talk that Shiraz started working on RBP elements while still at Commodore, but regardless Jack started up Tramel Technology Ltd. to pursue the new computer and Shiraz and a team had joined him by the end of April/early May. During that time Jack drove up and down the coast looking at various technologies to leverage, and he did visit places like Mindset and Amiga. This is the where the myth about Jack wanting to base it on Amiga technology and quickly needing to go a different route got started. Jack was visiting a lot of places and entered in to talks with many of them, including Amiga. The talks never got further than just wanting to buy out the technology, and certainly never influenced the designs already in progress. In fact RBP was still a planned 32-bit computer at that time, based around the NS3200 microprocessor. They later decided to go with the 68000 over sourcing and cost issues.

The Japanese of course never gained a foothold, and instead the drama between Commodore and Jack/Atari Corp. took center stage. Warner CEO Steve Ross cold called Jack in May about buying out some of the Atari Inc. assets and they were in on and off negotiations until July when they signed the agreement. Commodore, upon hearing this, filed the injunctions against Shiraz and the others - not once but twice over the July, effectively shutting down Jack's computer operations for the rest of the month. Toward the end of July Jack's son Leonard discovered the contract and cashed check between Atari Inc. and Amiga, not long after Commodore announced their pending Amiga acquisition, and Jack used it to launch a counter attack. Amiga's original Atari Inc. deal was through Warner and *not* Atari Inc., it was just executed by Atari Inc. It did *not* come with the assets purchase. Jack negotiated with Warner for the contract in early August and launched his own suit (effectively a countersuit at Commodore) on Amiga in mid-August.

A lot of that only fueled the speculation in the press that a) Jack had wanted the Amiga technology for the new computer and lost it to Commodore, and b) Jack got back in to this to go after Commodore. Neither of which were true.

The suits wound up being dropped against Shiraz and the others after they returned materials Commodore felt were stolen, and Jack/Atari Corp. wound up settling out of court with Amiga/Commodore (which included Commodore paying back Atari Corp.'s court costs, which is usually a sign that it was in their favor).

We'll be going in to a lot more detail on all of this in the forthcoming Atari Corp. book.
Last edited by retrorogue on Wed Oct 01, 2014 7:19 pm, edited 2 times in total.
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FedePede04
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Re: Memory access time

Postby FedePede04 » Fri Sep 26, 2014 9:42 pm

thanks for the history retrorogue.
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