Detailed STE DMA audio documentation?

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MasterOfGizmo
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Detailed STE DMA audio documentation?

Postby MasterOfGizmo » Tue Oct 15, 2013 8:06 pm

Hi,

i am trying to implement the STE dma audio in verilog. The only documentation i have is the latest online version of the "profibuch" and the atari ste fanpage http://atari-ste.anvil-soft.com/html/devdocu4.htm. Both are a little sparse when it comes the STE audio.

I have several questions:
- When exactly is /xsint getting active and when is it being released? It cannot be active during the entire frame since in loop mode it would be permanently active which wouldn't make much sense. My current implementation activates it as soon as replay starts and de-asserts it when cur_addr == end_addr. Which leads to the next question:
- Is the end address actually ever reached? My implementation actually reached the end address (but without reading something) to have the pause necessary to generate a rising edge on /xsint
- What is the purpose of the 74ls164 shift register? I think it's somehow meant to compensate for the delay imposed by the word FIFO. But why is then delayed 250us (1/8 2Mhz cycle)? And the delay between writing the last word of a sample into the fifo and having it being played back is much longer than 250us.
- the control register can be read. What does one read there? Exactly what has been written or e.g. the current playback state in bit0?
- When are the addresses latched? I currently latch the end address, so it doesn't hurt if it's being overwritten while a frame is being played. In loop mode at the end of a frame i then reset the current address to the base address (which is not latched and may have changed) and update the latched end address fromt he current end address.

Also i have another question regarding the mfp: Even the latest profibuch claims that when timer a or b are in event or pulse mode the inputs i3/i4 don't generate interrupts. The datasheets in know say this only happens in pulse mode but not in event mode. I think the profibuch is wrong here ...

My implementation is sort of working. Something is wrong with playback speed. The pitch is correct (so the audio frequency is correct), but somehow the songs run too slow. I am not sure if i understand the sample rate correctly. My understanding is:

- in stereo mode exactly as many words as "sample rate" are fetched from memory per seconds. And e.g. in 25khz mode 25000 words are being read and one byte is sent to both outputs at that rate.
- in mono mode only half the words are needed and e.g. in 25khz mode only 12500 words are being read per second.

Still something is fishy ... maybe my hsyncs are too short and the fifo runs out of data ... will have to check that ...

And finally (just out of couriosity): Is video overscan "colliding" with audio? Is audio data transfer really limited to the sync phase or is it exteding into the borders and may thus collide with opened borders?
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lp
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Re: Detailed STE DMA audio documentation?

Postby lp » Tue Oct 15, 2013 9:46 pm

Last edited by lp on Wed Apr 10, 2019 2:06 pm, edited 1 time in total.

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Re: Detailed STE DMA audio documentation?

Postby Dio » Wed Oct 16, 2013 7:04 am

MasterOfGizmo wrote:And finally (just out of couriosity): Is video overscan "colliding" with audio? Is audio data transfer really limited to the sync phase or is it exteding into the borders and may thus collide with opened borders?

I don't think it's limited to sync time - it's simpler just to fill the FIFO on any MMU phase whenever the not-full request is active and video isn't required. I haven't put the analyser on the STE though to prove it.

But I think that even if there is only the sync time that's enough time to get the data - even in the worst case (50kHz stereo) 4 words per line are sufficient and there's more than enough time for that.

Now, one I do wonder about is if you can get a FIFO-empty glitch and slightly extended playback if sound is enabled just one cycle before the screen starts, when it doesn't have time to fill the FIFO. But if the value sent to the DAC isn't changed on FIFO empty then it still wouldn't be audible.

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Re: Detailed STE DMA audio documentation?

Postby AtariZoll » Wed Oct 16, 2013 5:22 pm

From own experience: when read control register, bit 0 presents actual state. If finished, you will read 0 there.

Considering colliding by overscan: I made audio playback with not max quality - mono, 25 KHz samplerate. Horizontal res is 416 px . Audio playback is flawless. The reason for lower quality is because it is for video playback, where datarate is far over usual hard disk speeds for Atari STE. So, I save little on audio. Certainly, would be good to test with stereo 50KHz . I will decrease little vertical res, so can have better audio - will do it this fall.
In any case, there is enough time in H-blank periods for 100 KB/sec.
Famous Schrodinger's cat hypothetical experiment says that cat is dead or alive until we open box and see condition of poor animal, which deserved better logic. Cat is always in some certain state - regardless from is observer able or not to see what the state is.

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Re: Detailed STE DMA audio documentation?

Postby nichtsnutz » Wed Oct 16, 2013 8:43 pm

Hi all,

some long time ago I had made some measurements of the dma-audio on a plain atari ste.
I post here some traces with my comments, maybe they can help.

The XSINT signal is getting active during the DE signal is low and inactive 4,5 stereo samples before the end.In loop mode
it is going inactive for a small time of 13.5us.
After XSINT is getting active the four preload samples are following.

dmasnd_3.jpg


Here a zoomout to see the bigger picture.The previous traces show the timing around the (T)rigger cursor:

dmasnd_1.jpg


In the following trace you can see the pattern: xsint will go active and then a small pulse inactive.I had output exactly 32 samples in
mono mode at 6.25kHz.Notice the ramp-values of the samples from 0x80 to 0x9F and then 0x80 again.

dmasnd_4.jpg


Here a zoom into a xsint impulse:

dmasnd_5.jpg


The end of a xsint :

dmasnd_6.jpg


Playing 32 mono samples one time:

dmasnd_7.jpg


It is really a very nice project you are doing MasterOfGizmo, respect for your knowledge and hard work !

The measurements are all mono in 6.25kHz single or loop mode.

I am sorry that I can not do more at the time.
The atari-ste is in the basement at the time and I do not think that
I will have the time to do more measurements now.Maybe at the
end of the year if things in life get more smooth.

Greetings,
Vassilis
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Re: Detailed STE DMA audio documentation?

Postby Guest » Wed Oct 16, 2013 10:46 pm

the dma buffers are there becouse the ste runs faster than the st series for acsi transfers
and so requires a 'frame store' for i/o
ie one byte level i/o store this negates issues with speed when it also has to address the floppy at the same time
i think the st unmodded cant do both as a dma event
most people who update a st to 1.44MB floppy and the controller overclock and replace etc
fail to change the floppy buffer ic to a faster bread
so it suffers packet loss to a degree

acsi is 8bit but double byte

so audio via dma is just the same data stream as dma to disk the dma sound as are all devices just mapped to a physical address
also any hardware used for dma audio via acsi it
uses a micro to decode the data then strobe mux d-a to reproduce it to audio {16 bit} and usually lives at a acsi id0 device
primitive codec as does the ste dma block you need to break out the mfp int chain to make full use of ste dma transfers via the rear dma port
and add a block of code as a driver for it

to clone the dma chip in verilog???? is your outcome ??

all chips in the atari series i think start life as a fused array lattice
and are flashed then dies to chip
not sure this helps i dont think they are all custom dies so 1ns time frame in the vhdl code is the best starting place

i can give you dll code i wrote up for the actual dma chip if its helpful

the dma chip is ultimate decider only a few chips can request the bus and get granted it

so there is a preamble to dma sound with the mfp and dma in control of the bus with the process transferring sound
and it usually hogs the bus a bit

any 8bit buffer and a latch/reset is just there as a 1byte store

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Re: Detailed STE DMA audio documentation?

Postby Guest » Wed Oct 16, 2013 11:09 pm

chip flow

set control register

address chip

load to fifo

do what control register says

output

you need to latch the control data first load the data at address to internal buffer
as its array then output it on int and grant {enable chip}
then act on it within the code callbacks

the output registers are usually not en till the control process has terminated and the chip is en from either the sound ic or the glue/mmu
after asking the mfp for service from the processor

send a control to it the control sets int the int is granted the data is sent the bus is granted the chip is en and the data is flopped to the bus
the other side picks it up and the process completes with a dma chip to mpu handshake

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Re: Detailed STE DMA audio documentation?

Postby RA_pdx » Thu Oct 17, 2013 7:05 am

Hi,

Great to see that you are working on STE support!
MasterOfGizmo wrote:- in stereo mode exactly as many words as "sample rate" are fetched from memory per seconds. And e.g. in 25khz mode 25000 words are being read and one byte is sent to both outputs at that rate.
- in mono mode only half the words are needed and e.g. in 25khz mode only 12500 words are being read per second.

The accurate sample frequencies are:

50066 Hz
25033 Hz
12517 Hz
6258 Hz
>> > raZen/Paradox < <<

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Re: Detailed STE DMA audio documentation?

Postby Dio » Thu Oct 17, 2013 7:25 am

The accurate sample frequencies are 8.010613MHz divided by 160, divided further by 1, 2, 4 or 8.

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Re: Detailed STE DMA audio documentation?

Postby AtariZoll » Thu Oct 17, 2013 7:37 am

Correct about dividing from existing clock freq. What made STE incompatible with usual audio sample rates - troubles for usage. They saved 1 quartz clock generator, but could brag that have better samplerate than CD audios :mrgreen:
Famous Schrodinger's cat hypothetical experiment says that cat is dead or alive until we open box and see condition of poor animal, which deserved better logic. Cat is always in some certain state - regardless from is observer able or not to see what the state is.

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Re: Detailed STE DMA audio documentation?

Postby RA_pdx » Thu Oct 17, 2013 8:10 am

Dio wrote:The accurate sample frequencies are 8.010613MHz divided by 160, divided further by 1, 2, 4 or 8.

:roll: Okay, my values are just rounded.
>> > raZen/Paradox < <<

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Re: Detailed STE DMA audio documentation?

Postby Dio » Thu Oct 17, 2013 11:52 am

AtariZoll wrote:Correct about dividing from existing clock freq. What made STE incompatible with usual audio sample rates - troubles for usage. They saved 1 quartz clock generator, but could brag that have better samplerate than CD audios :mrgreen:

I find the STE a very odd piece of hardware. Considering the limited extra capabilities it adds, it must have cost a shedload extra to make - there's just so many components on there.

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Re: Detailed STE DMA audio documentation?

Postby AtariZoll » Thu Oct 17, 2013 12:26 pm

Most place is taken by analog filters for audio DMA . + Some for analogue joysticks.
Famous Schrodinger's cat hypothetical experiment says that cat is dead or alive until we open box and see condition of poor animal, which deserved better logic. Cat is always in some certain state - regardless from is observer able or not to see what the state is.


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