I'm writing this reply offline- damn power keeps going out. Write a bit and save...etc
Here's a guide to ROMs in the Atari the best I can explain and simplify it. I'll reiterate what you probably know- and expand on it.
The old STs, STacy & Mega use TOS 1.0 to 1.4. There are plenty of threads that detail the differences, but basically blitter support was added in 1.2, and 1.4 was a bug fixed and improved version of it. Think HDD speed improvements, and faster windows. STe's got the famous bugged TOS 1.6, and later 1.62- both of which were little more than enhanced 1.4 with DMA sound and other hardware support added.
The STe is the only Atari that TOS 2.06 will directly plug in and run without any modification other than a jumper change.
MegaSTEs ran the slightly earlier 2.05, but obviously accepts 2.06 as well.
TTs were TOS 3.0x and 32bit.
Falcon TOS 4.xx.
We can thank originally a third party hardware accelerator upgrade, that saw TOS 2.05 modified for older ST support- and the idea was taken up by Atari as a possible upgrade. While that never really occured, at least the code was modified officially completed- and became 2.06.
So really, TOS swaps are fairly limited. The are all geared toward the target machine. v1 or 2 for ST/STe, v3 for TT, v4 for Falcon. (MagicC is an option too, and covered a bit later)
Okay, ROMS.. the dark art of bits and bytes. For the love of binary. Base 2.
Without going through a complete explaination of binary.. goto Wikipedia... but every time you increase the number of available bits to represent a number- you double in capacity. Its (usually) the Most Significant Bit that has that power.
What the fark am I talking about....?
Its the number of 'Address' pins that determines a ROMs' capacity. Its width is represented by its 'Data' bus... usually 8bit.. 8pins. The Atari generally has a 16bit data bus. We need then two ROMs to feed that. They share though the address lines. (I'm simplifiying here, the CPU can address more, and some hardware needs even less..... but go with me)
The ROMs used in the old STs are 32k x8 each. They used 3 pairs for 192kilobytes.... Ahh you say- what of the two chip version. 128k x8.(1MegaBit)... just like the bigger 2.05/06 chips.
See those larger roms have two more address lines... they are 4 times larger.
Now the cavet... why then doesn't 2.06 work on the old ST.. it fits in the two chip setup.
Yes but. The trouble is, lots of things are on the address bus. All taking their turn. Their turn is chosen by an enabling signal.
As far as the ST is concerned, much of the 'enable' signals get generated by the GLU chip.
It gets rather technical how the glu generates those enable signals- but know this... the CPU when told to look at a particular starting address in its wide range- then wants to know everything in that range- all sixteen bits of it. The enable signal gets the ROM or DMA (or ACIA/MFP etc )chips online- then they are addressed within their own range, and spew out data from their buses.
The old GLU chip doesn't have an enable output to suit the address 'position' TOS 2.0x is programmed for. It has lots of outputs- the ROM ones are labeled... ROM 0,1&2 serve upto 6 TOS ROMs, and then a further ROM 3 & 4 for the cartridge port. (The STe even has undocumented ROM 5 & 6 output pins).
Two chip TOS uses ROM2 to enable the pair.... the ST scans from the TOP down... cartridges inserted and seen by ROM3&4 will be read before TOS ever does!
If we could reprogram the GLU chip, we could reassign the new alternative address ROM2 points to for 2.06. However we can't, so Instead we can build a circuit that will do the job for us. It can see when the CPU is trying to access that desired range, and will switch on the ROM chips to let them deliver.
I'm not sure I can say it any simpler.
Now what.... MultiTOS.
How can I have more than one TOS?.... Run ROMs big enough to hold them like 4MB. As a result of being bigger- they have even more address pins. The Atari won't use them, but you can. One more Pin doubles the ROM in size, 2pin is quadruple- compared to what we had. 1 vs 4Megabit.
All address pins do is go hi or lo. Zero volts, or 5 volts for typical circuits. Those extra upper 2 pins can be put hi/hi, hi/lo, lo/hi, lo/lo. Manually. Now we have a bank switching mechanism. Toggling those upper bits decides how we divide the contents of the ROM.
The slightly tricky part is- how then do we program ROMs, and furthermore... MultiTOS. Easy.
Most chip programming devices can be told a range to program in. That range can be configured into as many little space as you wish.
Due to size of TOS, it will fit 4 times in a dutiful pair of 8-bit 4Meg ROMs. By manipulating the two excess upper address 'bits', you can force/choose the area the ST needs to see.
Just to be annoying, the two chip STs use a hard to find set of ROMs that manage to squeeze in the two extra address pins within the older 28pin socket. Most often these days, those size ROM are found in a common 32pin version. Just like Proper TOS 2.06. Its a better and more standard setup for the position of the enabling pins.
I guess this isn't sounding easy. It is because of the pin configuration differences in these bigger ROMs, that the STe has that set of three jumpers to configure where those bloody address pins are located. Even the older STs has some solder links for this reason.
So, perhaps I'll finish here, and see what more detail you would like to see explained.
PS, I appologise if the grammer and syntax is a little off.. I 've written this post a couple times now. The details are less than originally planned......