Introducing "SNES on FPGA"

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Introducing "SNES on FPGA"

Postby alexh » Tue Aug 22, 2017 11:27 am

I saw a previous thread about someone who developed a closed source SNES HDL re-implementation.

Many years previously a developer in Japan also developed a closed source SNES HDL re-implementation BUT he has provided binary ports to different FPGA boards.

Might be worth contacting the developer and asking for a port to MiSTer

http://pgate1.at-ninja.jp/SNES_on_FPGA/index.html
Last edited by alexh on Tue Aug 22, 2017 4:14 pm, edited 1 time in total.

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Re: Introducing "SNES of FPGA"

Postby Sorgelig » Tue Aug 22, 2017 11:53 am

May be worth. Then contact him if you are eager to get it ported.
More pointless topics about SNES - more i dislike this.
Really, this console doesn't deserve so much hype. I understand nostalgic feeling about computers you had long time ago. Apps you wrote, OS you worked in. But this dirt cheap console? common.. you still can buy it for couple bucks and enjoy. It's not like Amiga computer which is very pricey, or some forgotten computer which is impossible to buy it and especially make it work..

I don't understand the hype about this.

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Re: Introducing "SNES of FPGA"

Postby alexh » Tue Aug 22, 2017 12:11 pm

The SNES (+SuperMagicom) was where lots of UK Amiga/Atari users transitioned to while saving for a x86 PC's. I'd go to Scene events in the early 90's with my SNES+Magicom and it drew a crowd.

Base model real Amiga's today are certainly cheaper to buy than a real SNES + Everdrive in the UK

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Re: Introducing "SNES of FPGA"

Postby Sorgelig » Tue Aug 22, 2017 12:43 pm

Comparing price of bare Amiga A1200 and SNES with extras is not correct.
Then compare A1200+68060 accel if you want to compare the prices.
Even bare A1200 hard to get for less than 200USD while SNES can be found for 60-80USD.

Nintendo released the mini SNES. It won't take long time when it will be hacked to play any SNES game.

Anyway, the only who can make SNES cores happen are fans! If you are big fan, then go to developers and convince them to port it to MiST or even release the source code.

I remember Till (MiST creator) told that writing a SNES core should be trivial as most modules are available in sources. Push him then :)
It seems SNES was "so popular" than no developer can be found to create the core ;)

For me: having SNES in FPGA is good, but not more. I don't have any nostalgic feeling to any console. I like retro computers. I would port SNES to MiST/MiSTer, but i'm not interesting in creating it from ground. Not worth from my point of view.
So, it whould be some developer who is the big fan of SNES and has realistic views. Running around and asking $400K for source is unrealistic view. There is no commercial value today for SNES code - doesn't matter how good it is.

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Re: Introducing "SNES of FPGA"

Postby farvardin » Tue Aug 22, 2017 2:34 pm

I've never played on a real SNES (I had no console when I was younger, only computers), but I must admit this console is very good, like for the Megadrive. Many SNES games are similar, or better, than their 16/32 bit equivalent.

The advantage also was a game in several floppies could be included in a single cardridge. Some other games, genuine on the SNES are very good (Kirby for example, I enjoy playing this with my son).

I don't request a SNES on FPGA, but a port on MiST would be cool, of course, the more the better :)

At the moment, I can play with it on a Raspberry Pi emulator.

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Re: Introducing "SNES of FPGA"

Postby alexh » Tue Aug 22, 2017 4:27 pm

Sorgelig wrote:Comparing price of bare Amiga A1200 and SNES with extras is not correct.

The price/functionality of an A500 + Gotek can pretty much be compared to a SNES + Everdrive. Can't it?

Sorgelig wrote:compare A1200+68060 accel if you want to compare the prices.

I don't think that is valid. The Everdrive is just a cartridge emulator and can only be compared to the Gotek Floppy disk drive emulator which costs about $15

Sorgelig wrote:Even bare A1200 hard to get for less than 200USD

A500 in UK can be bought for about $25

Sorgelig wrote:Nintendo released the mini SNES. It won't take long time when it will be hacked to play any SNES game.

It's an SoC running an emulator. Might be very good though.

I have written to the "SNES on FPGA" author to see if he would be willing to help if I buy and give him a free MiSTer. I had of course to write in English and the author is Japanese so he may not understand?

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Re: Introducing "SNES of FPGA"

Postby Sorgelig » Tue Aug 22, 2017 5:14 pm

alexh wrote:The price/functionality of an A500 + Gotek can pretty much be compared to a SNES + Everdrive. Can't it?

Can't. I'm talking about A1200 in good condition. Not about yellow semi-working A500. I know prices of Amiga. Even A500 in good condition won't cost 25.
Didn't i tell you "buy a NES instead"? NES, SNES - should be no difference, right? Same for those who don't care the difference between A1200 and A500.

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Re: Introducing "SNES of FPGA"

Postby Sorgelig » Tue Aug 22, 2017 5:19 pm

alexh wrote:I have written to the "SNES on FPGA" author to see if he would be willing to help if I buy and give him a free MiSTer. I had of course to write in English and the author is Japanese so he may not understand?

Some one said, his SNES is written in some language other than VHDL/Verilog. If it's true, then i'm not sure if it possible to compile it in Quartus.

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Re: Introducing "SNES on FPGA"

Postby Gehstock » Tue Aug 22, 2017 5:26 pm

SFL+ i dont know it but Core runs on a Altera FPGA
Not only my Cores for MIST/MISTer : https://github.com/Gehstock

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Re: Introducing "SNES of FPGA"

Postby alexh » Tue Aug 22, 2017 5:40 pm

Sorgelig wrote:
alexh wrote:Some one said, his SNES is written in some language other than VHDL/Verilog. If it's true, then i'm not sure if it possible to compile it in Quartus.

It's written in VHDL (or at least the top level supplied in the Zip file is) and is built for the DE0 and DE1 which use Altera so I imagine thay uses Quartus?
Last edited by alexh on Tue Aug 22, 2017 5:43 pm, edited 1 time in total.

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Re: Introducing "SNES of FPGA"

Postby Sorgelig » Tue Aug 22, 2017 5:42 pm

alexh wrote:It's written in VHDL and is built for the DE0 and DE1 using Quartus

Then it should be just matter of his willing. I can help him if he would like.

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Re: Introducing "SNES of FPGA"

Postby DanyPPC » Wed Aug 23, 2017 3:46 pm

farvardin wrote:I don't request a SNES on FPGA, but a port on MiST would be cool, of course, the more the better :)

Surely, but the most important thing is the quality and compatibility of simulation in fpga.
Rather than tens and dozens of cores I prefer few cores but of great quality.
I refer to Commodore 64, Vic 20, Amiga, Atari ST, NES, Amstrad, MSX, Spectrum ones.

Much work is needed to achieve this goal, and unfortunately we often have to deal with incomplete jobs that leave some bitter in the mouth. :(

But I'm optimistic and I hope so much that the MiST can give us a lot of satisfaction.

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Re: Introducing "SNES of FPGA"

Postby Sorgelig » Wed Aug 23, 2017 5:35 pm

DanyPPC wrote:Surely, but the most important thing is the quality and compatibility of simulation in fpga.
Rather than tens and dozens of cores I prefer few cores but of great quality.
I refer to Commodore 64, Vic 20, Amiga, Atari ST, NES, Amstrad, MSX, Spectrum ones.

Much work is needed to achieve this goal, and unfortunately we often have to deal with incomplete jobs that leave some bitter in the mouth. :(

But I'm optimistic and I hope so much that the MiST can give us a lot of satisfaction.

I also hope DanyPPC will take all these cores and make them perfect. It's such unprofessional from DanyPPC side having the MiST and don't fix them. Right?

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Re: Introducing "SNES on FPGA"

Postby DanyPPC » Wed Aug 23, 2017 6:55 pm

Yes, you are right !

My apologies :angel:

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Re: Introducing "SNES on FPGA"

Postby alexh » Fri Oct 13, 2017 9:07 am

After a release to the DE0-CV board the author pgate1 has said he will consider a port to MiSTer

https://twitter.com/a1exh/status/918523392281718784

[Update] However he has said that he will only be able to supply pre-built images (sof?) and not the HDL. Which is better than nothing?

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Re: Introducing "SNES on FPGA"

Postby nightshadowpt » Mon Oct 16, 2017 4:54 am

That would be huge...

Fingers crossed that this will happen!

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Re: Introducing "SNES on FPGA"

Postby Sorgelig » Mon Oct 16, 2017 12:47 pm

I don't know where these developers got idea that they can earn big money on their retro console replica. Although it's hard to make a precise replica of SNES, there is no commercial point of view to invest the money to this. There is already perfect emulator running on ARM CPU which cost nearly nothing comparing to FPGA or ASIC chips. All SNES games run fine in emulator and no company will be interested to pay even 1 dollar for the source since HW will be much much more expensive than cheap chinese ARM CPU board.
There is absolutely no commercial value of SNES FPGA core. It's interesting only for geeks/hobbyists. And it will be a pity if the code will go to limbo which means the whole effort for developing these undoubtedly interesting cores will be in vain.

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Re: Introducing "SNES on FPGA"

Postby NegSol » Mon Oct 16, 2017 4:02 pm

@Sorgelig: I share your view! One has to be a real geek to look into FPGA for retro gaming these days. I would estimate that the audience world wide for this kind of hobby is below 1000 individuals. Happy us few ;-)

Anyway for those who want to play spot the MiSTer on the pics in the link below

https://imgur.com/a/QYcja

posted today on http://forums.nesdev.com/viewtopic.php? ... &start=195

:angel:

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Re: Introducing "SNES on FPGA"

Postby NegSol » Tue Oct 17, 2017 6:33 pm

For those who are not following the news items as closely as I.

In light of the announcement of the Super NT SNES FPGA by Analogue jwdonal the developer of the VeriSNES confirmed once more that his goal is to get his core open sourced. Terrific news! I hope he accomplishes his goal. :D

Quote: "My goal is to get the entire SNES design and additional information open sourced."
http://forums.nesdev.com/viewtopic.php? ... &start=210

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Re: Introducing "SNES on FPGA"

Postby Sorgelig » Tue Oct 17, 2017 8:33 pm

NegSol wrote:For those who are not following the news items as closely as I.

In light of the announcement of the Super NT SNES FPGA by Analogue jwdonal the developer of the VeriSNES confirmed once more that his goal is to get his core open sourced. Terrific news! I hope he accomplishes his goal. :D

Quote: "My goal is to get the entire SNES design and additional information open sourced."
http://forums.nesdev.com/viewtopic.php? ... &start=210


it's better forget about VeriSNES. Let him play his code alone :)


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