Introducing the VeriSNES (FPGA-based SNES)

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Estrayk
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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby Estrayk » Fri Aug 11, 2017 2:56 pm

jwdonal wrote:Hello all,

I'm the creator of the VeriSNES. It was funny to discover that I already had my own thread on this forum.....considering I only just now registered. :lol:

In any case, I would like to discuss with whoever the board designer for the MiST is. I'm not at all familiar with the MiST board so I need some contact information. I'd like to discuss teaming up to get the VeriSNES ported to the MiST (if possible).

Thanks!


Open a donation PayPal account and I'm sure that MIST community will support you for buy a MIST for that you port your core.
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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby Zarchos » Tue Aug 15, 2017 8:36 pm

OK thanks.
I agree you can always find some good infos here and there, but from my ASM learning experience, I remember I would have prefered to be pointed to the RIGHT book from the start, written by sbdy who, it was obvious, actually mastered the topic, and had spent a lot of hours doing good, optimised coding.

Thanks for your help, highly appreciated.
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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby squid4 » Thu Aug 17, 2017 6:31 am

That Japanese SNES fpga developer has just released his source! Looks like he's been monitoring the latest VeriSNES news.
https://www.reddit.com/r/fpgagaming/comments/6u4j43/released_snes_on_fpga_japanese/

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby jwdonal » Thu Aug 17, 2017 6:36 am

Lol. Hate to burst your bubble, but it's not source. Not even close. It's a bitstream file only, locked to a specific FPGA device, locked to a specific FPGA board, 4-bit color output only, and 1-bit audio output to GPIO pins which requires an amplifier to hear. So yeah, not source. ;)

Also, even if he does release the source he wrote it in this weird high-level synthesis language used in Japan called "SFL" which isn't even Verilog/VHDL. He has stated several times that he has no idea how to write HDL. :)

Cya!

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby squid4 » Thu Aug 17, 2017 9:10 am

Darned Google Translate :)

jwdonal, the world is your oyster then! I almost wet myself when you announced VeriSNES maybe ported to the MiST/MiSTer (MiST 2?). That would be the "killer app" for FPGA.

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby axxxtz » Tue Aug 29, 2017 2:19 pm

Hi @all,
just ordered my DE10-Nano for MiSTer...
I would go nuts for a fully working SNES core!
And donate via PayPal ;D ...
Kind regards, Alex

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby jwdonal » Fri Sep 15, 2017 6:51 pm

Hello all,

The VeriSNES has been ported to the DE10-Nano w/ Mister daughter boards and also now supports HDMI. See here:

https://www.youtube.com/watch?v=7ae5iUe8diY

Enjoy!

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby NegSol » Fri Sep 15, 2017 7:32 pm

Wow - I am lost for words - great job!!! :D

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby NML32 » Fri Sep 15, 2017 7:39 pm

This is fantastic news!!

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby Sorgelig » Fri Sep 15, 2017 9:52 pm

jwdonal wrote:The VeriSNES has been ported to the DE10-Nano w/ Mister daughter boards and also now supports HDMI. See here:
https://www.youtube.com/watch?v=7ae5iUe8diY
Enjoy!


Do you mean enjoy just the video? I can't find a download link.

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby nightshadowpt » Sun Sep 17, 2017 3:44 pm

Nice!

I'm pretty sure this will massively attract people to the MiSTer.

Good job!

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Re: Introducing the VeriSNES (FPGA-based SNES)

Postby yarko » Sun Sep 17, 2017 5:27 pm

Will this core fit into Mist fpga?


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