MiSTer (FPGA): Oric1 / Atmos Core

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rondc
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Re: MiSTer (FPGA): Oric1 / Atmos Core

Postby rondc » Wed Sep 04, 2019 4:48 pm

nico24 wrote:Oldgit - perfect - long term the internal file parsing has to be the way forward.
Sorgelig - i think it was the line: assign ‘Z to the ADC bus, maybe waking it up.

Ron - this is for MiSTer. I think to be able to do it in MiST through UART you will need to solder a circuit for input.


Thank You very much. I Also have a MiSTica, which includes EAR and MIC audio ports.

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rondc
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Re: MiSTer (FPGA): Oric1 / Atmos Core

Postby rondc » Mon Dec 23, 2019 2:34 pm

Hí !

Working on the Oric core for MiST / MiSTica / SIDI we have discovered an ULA bug since the very first versions.
It affects to ZXUno and MISter cores, in case anyone is interested in correcting it, you'll find at rampa069's git.

https://github.com/rampa069/Oric_Mist_48K

Regards, merry Xmas !


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