Sorgelig wrote:Your understanding is wrong. Auto-refresh is not hidden. HyperRAM has special output signal which shows refresh cycle, so host has to suspend any operations till this signal become inactive again. You cannot control it. You only can wait for it.
It's the same as DDR3 with HW memory controller used on both DE10-nano and Novtech boards. So, you don't need HyperRAM as you already have the similar DRAM with uncontrolled refresh cycles. And this RAM cannot be used in system where precise timings are required.
You are right, my bad. But it still might be possible to use it as long as the core can afford a higher latency. Instead of using it directly, that it will require a variable latency, you operate assuming the worst case that a refresh cycle is always needed. Then you get a fixed latency, that of course is longer.
The hard memory controller on the DE-10 SOC is not exactly the same. Not only you have to wait for refresh cycles. In this case you also wait for other clients (such as Linux) accessing the RAM.