MiSTer on DE10-Standard - needed?

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Sorgelig
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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Thu Feb 22, 2018 9:37 pm

Your understanding is wrong. Auto-refresh is not hidden. HyperRAM has special output signal which shows refresh cycle, so host has to suspend any operations till this signal become inactive again. You cannot control it. You only can wait for it.
It's the same as DDR3 with HW memory controller used on both DE10-nano and Novtech boards. So, you don't need HyperRAM as you already have the similar DRAM with uncontrolled refresh cycles. And this RAM cannot be used in system where precise timings are required.

ijor
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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Thu Feb 22, 2018 9:51 pm

Sorgelig wrote:Your understanding is wrong. Auto-refresh is not hidden. HyperRAM has special output signal which shows refresh cycle, so host has to suspend any operations till this signal become inactive again. You cannot control it. You only can wait for it.
It's the same as DDR3 with HW memory controller used on both DE10-nano and Novtech boards. So, you don't need HyperRAM as you already have the similar DRAM with uncontrolled refresh cycles. And this RAM cannot be used in system where precise timings are required.


You are right, my bad. But it still might be possible to use it as long as the core can afford a higher latency. Instead of using it directly, that it will require a variable latency, you operate assuming the worst case that a refresh cycle is always needed. Then you get a fixed latency, that of course is longer.

The hard memory controller on the DE-10 SOC is not exactly the same. Not only you have to wait for refresh cycles. In this case you also wait for other clients (such as Linux) accessing the RAM.

Sorgelig
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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Thu Feb 22, 2018 10:35 pm

You always have to count on worst case scenario if you simulate a precise RAM timings on retro system. It's true that still many systems don't require precise timings so you just need to keep some macro timings. But usually in this case you can simply use DDR3. Even tough you think it's pretty busy by other clients like linux, video scaler - it's still very very fast. It runs on 800MHz. ARM has cache. I'm using DDR3 in Genesis and PCE cores and it works without any problems.
Other cores may use some special tricks depending on implementation. For example, C64 needs a lot of RAM because of cartridge support - and i believe it's possible to use DDR3 for cartridge and simply copy required part of cart memory to BRAM when ROM banks are being switched. It requires some time to implement. But if there is no choice, it's possible.

Another problem with PSRAM/HyperRAM is max of 128MBit per chip. SDRAM used in MIST/MiSTer is 256MBit. So, for compatibility you need to use 2 chips which will give more troubles. PSRAM is actually DDR requiring diff-clock and much cleaner signals to operate.
Currently, i see more troubles than advantages of these PSRAM chips.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Fri Feb 23, 2018 1:16 am

Sorgelig wrote:Another problem with PSRAM/HyperRAM is max of 128MBit per chip. SDRAM used in MIST/MiSTer is 256MBit. So, for compatibility you need to use 2 chips which will give more troubles. PSRAM is actually DDR requiring diff-clock and much cleaner signals to operate.
Currently, i see more troubles than advantages of these PSRAM chips.


I agree, of course. The idea of using something like HyperRAM was for cases when you don't have enough pins to use SDRAM.

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Re: MiSTer on DE10-Standard - needed?

Postby olin » Fri Feb 23, 2018 8:50 am

It could be a mini-Mister if could be possible to add SDRAM.

Well, why not call it MiniSTer then? :D


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