Considering TRS-80 CoCo port to MISTer

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cocotower
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Considering TRS-80 CoCo port to MISTer

Postby cocotower » Wed Nov 22, 2017 1:03 am

I created the DE0-Nano based CoCo 3 clone a few years ago and am working on it daily to maintain it but was recently exploring the idea of also porting the CoCo to MISTer. A supporter sent me a DE10-Nano and I've gotten so far with my own core that fires right up into the CoCo with HDMI video.

My current DE10-Nano version of the CoCo has been trimmed down for the porting process, but I have 512KB of FPGA RAM for the CPU/video, and HDMI output already, just no USB keyboard or mouse support yet. I need to keep the 512KB block RAM if possible.

Is there a base project or template I can use that shows what all of the cores have to go through to get resources from the Linux side, like USB keyboard/mouse inputs, MicroSD card access, etc.? I see a common "sys" folder in some of the core source I browsed through.

What I've done so far:
Installed latest MISTer and updates on fresh MicroSD card
Added NES core and one sample ROM
Can't get my mini tablet USB keyboard or USB mouse to respond to the MISTer menu (keyboard probably isn't compatible?, mouse isn't used?)

Sorgelig
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Re: Considering TRS-80 CoCo port to MISTer

Postby Sorgelig » Wed Nov 22, 2017 8:24 am

For study purpose, it's better to study piece by piece. If you want to see all mentioned parts working in a single core then it will be pretty complex core.
Start from something simple with keyboard communication only. I suggest to take some arcade core - they only use keyboard to communicate with linux part.
I strongly suggest to use my framework (modules in sys folder) which is included in every MiSTer core. Otherwise you will be buried in low-level HPS-FPGA interfaces.
Also, do not target your core for 512KB of BRAM. Part of BRAM is used for video scaler and OSD. It's better to target your core for ~384KB BRAM. 1MB of 55ns SRAM you've mentioned in other topic can be replaced by SDRAM i think.
Try to port CoCo3 with its real characteristics first. 99.9% of usage will be with software developed for real CoCo3.

After initial port, you(or we) can try to increase the speed. My ZX core can run at 56MHz(with some wait states) with SDRAM used as a main ZX RAM.


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