Sorgelig wrote:Would be interesting to see max speed of this SDRAM chip you can achieve in memtest core.
I've recompiled memtest, but I think by default it is configured to 167MHz. Currently testing Winbond w9825g6jh-6 SDRAM that I desoldered from a board in my junk box. On 167MHz it behaves weirdly, first minute under the test it prints tons of errors, after that it is 'stable' for ~10 seconds, then increases error count by one, then it's stable for anther ~10 seconds, adds 1 error etc. When I start the test over it behaves the same.
I also compiled the 114 MHz version from your previous commit and that frequency seems more stable (0x14 errors in 25 minutes). So the SDRAM looks promising (I might have damaged the chip during desoldering though...).
It would be great if you could regenerate those qip pll.* files for different frequencies and commit them in different branches or whatever is most convenient for you. I could then build these different frequency rbfs and do more tests.
Sorgelig wrote:P.S.: ah, it's 16MB chip.. Note: it has 12 address pins instead of 13 on 32MB/64MB chips. You will need to change the SDRAM HDL modules to work with reduced address bus.
That's correct, I bought few extras for experiments (soldering and timing) I also have the same one in 32MBytes. Also I found some other junk boards with Etrontech EM639165TS-6G (16MB only) and also ESMT M12L25616A (unknown speed, the marking on the chip vanished). I'll eventually solder them for tests.
12 address pins - OK, I can see 'parameter DRAM_ROW_SIZE = 13' in memtest.sv, so I'll experiment with that. Thanks for the tip.
edit: fixed the boot issue
. Embarrassingly it was the wrong placement of the buttons so they were always pushed and pulling some gpios down. Once I've repositioned the buttons (painstakingly desolder them) the issue was solved. I also found few lesser issues with the board: missing ground connection on the outer shield of VGA connector (hack fixed on the board), C9 was completely missing(!) but easy fix was to solder it on the bottom ground plane to an exposed track. The public fixes of the IO board for de0-nano-soc will follow soon.