MiSTer: MiST on Terasic DE10-nano board.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Slade » Thu Sep 07, 2017 8:49 am

Methanoid wrote:I must be missing something but how come MiSTer (mini MIST) does not run ST... Wasnt MIST first made for ST then Amiga?


I guess it hasn't been ported yet. It would be nice to add to the collection, and I'm sure at some stage if the source is available it will be ported. Right now sorgelig is doing most of the work himself, so cores get ported and updated when he has time.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby gagadagatika » Thu Sep 07, 2017 8:54 am

Methanoid wrote:I must be missing something but how come MiSTer (mini MIST) does not run ST... Wasnt MIST first made for ST then Amiga?


I think the name is derived from the fact that it's based on the MiST firmware for the core management. As far as I know, the AtariST Source of the MiST is not available. That makes porting it quite difficult.

But yeah, I would be more than happy if a port would be possible in the future :)

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 10:14 am

Methanoid wrote:I must be missing something but how come MiSTer (mini MIST) does not run ST... Wasnt MIST first made for ST then Amiga?

I never had Atari. What i understand, Atari ST should be at least at Amiga 500 level by features. I've tried ST core on MiST some time ago. Something ugly monochrome windows interface loaded with strange video mode. It wasn't near to Amiga Workbench level. Is it really Atari ST?? I've also read it has serious compatibility issues and far from finished..
Thus i've decided not to waste the time. If i understood correctly, ST requires 68030 with MMU to work correctly which is not available currently in FPGA.
Basically, needs some developer who has/had Atari and know how it works. I'm completely unaware of Atari area.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby nightshadowpt » Thu Sep 07, 2017 12:29 pm

The GEM interface is frankly uglier than Amiga Workbench, but power wise the ST is pretty much on par with the Amiga, with the main differences being a slightly faster 68000 (8Mhhz on the ST vs 7.16 on the Amiga) and all the additional customs chips in the Amiga (Agnus, Denise and Paula).

Other than that, they were very similar in power.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Methanoid » Thu Sep 07, 2017 1:03 pm

plus no 68030 or MMU in standard form so the ST core should be (arguable) simpler than the Amiga one...

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 1:30 pm

Methanoid wrote:plus no 68030 or MMU in standard form so the ST core should be (arguable) simpler than the Amiga one...

why people in Vampire thread always talking that MMU is a must for ST?

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby vido » Thu Sep 07, 2017 1:35 pm

Sorgelig wrote:why people in Vampire thread always talking that MMU is a must for ST?

Because MiNT OS on high end Ataris can use MMU for memory protection.
And most Atari users use MiNT on high end Ataris.
Without MiNT I would abandon Atari platform.

And who is talking about ST?
We are talking about Atari clone on Vampire thread. I dont care about ST ...

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby ijor » Thu Sep 07, 2017 2:47 pm

Methanoid wrote:plus no 68030 or MMU in standard form so the ST core should be (arguable) simpler than the Amiga one...


Not sure if it's really simpler, it still has custom chips, plus several off the shelf rather complex chips. But regardless if it is simpler or not, it probably requires much more accuracy.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby alfishe » Thu Sep 07, 2017 3:07 pm

ijor wrote:
Methanoid wrote:plus no 68030 or MMU in standard form so the ST core should be (arguable) simpler than the Amiga one...


Not sure if it's really simpler, it still has custom chips, plus several off the shelf rather complex chips. But regardless if it is simpler or not, it probably requires much more accuracy.


Since MiST/MiSTer are all about emulation on hardware logic level - every chip needs to be simulated. Better chance to get VHDL/Verilog code for wide-spread chips and/or platforms. Custom chip and low population of devices/users means - very low chance to get hardware emulation done. Especially as an opensource project. Sad but true

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby ijor » Thu Sep 07, 2017 4:36 pm

alfishe wrote:Since MiST/MiSTer are all about emulation on hardware logic level - every chip needs to be simulated. Better chance to get VHDL/Verilog code for wide-spread chips and/or platforms. Custom chip and low population of devices/users means - very low chance to get hardware emulation done. Especially as an opensource project. Sad but true


That might be very true in theory. Please point me to cycle accurate open source cores for the "wide-spread" LSI's used in the ST? Because I am not aware they exist for most of them. So far there is not even a cycle accurate open source core for the 68000. And the 68000 certainly doesn't count as a low population device, does it?

But regardless, and as I said already, the main problem of an ST compatible core is perhaps not the complexity, but the required accuracy.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 4:52 pm

On computers where 68000 is used usually cycle accuracy is not required. It's more important how correct every instruction is executed. Minimig is pretty compatible with most Amiga 500-1200 software, so the CPU is not an issue.

Atari ST core need dedicated developer who knows how it works internally. Amiga is full of custom chips and it work reliably in FPGA.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby toromand » Thu Sep 07, 2017 5:03 pm

Google-ing around for ST FPGA, apart from MIST, brings Suska up. They claim pretty accurate ST implementation, but you probably know that. They are also present on this forum. I just posted this as nobody mentioned it as a possible source of information or even VHDL.- but as mentioned, you probably know the situation better. I guess that the fact they produce their own board doesn't help :(

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby ijor » Thu Sep 07, 2017 5:17 pm

Sorgelig wrote:On computers where 68000 is used usually cycle accuracy is not required. It's more important how correct every instruction is executed. Minimig is pretty compatible with most Amiga 500-1200 software, so the CPU is not an issue.


Exactly! As you are saying, "usually" cycle accuracy is not required. But in the case of the ST it is. Trust me, I know what I am talking about.

And yes, I am aware that the Minimig is very compatible with most Amiga software. Precisely because it seems that the 68000 core in the Minimig is good enough for the Amiga, but not so much for the ST. For starters, the ST uses some features of the 68000 that the Amiga does not, such as Bus Error exceptions. And that is, precisely, one of the 68000 features more difficult to emulate accurately.

It is well known that the ST requires higher 68000 accuracy than the Amiga. We know that from software emulators even before we had FPGA "clones".

toromand wrote:Google-ing around for ST FPGA, apart from MIST, brings Suska up. They claim pretty accurate ST implementation ...


It is not cycle accurate. It is not even the developer's goal to be cycle accurate. He is more interested in implementing a Falcon (68030 level ST) compatible core, which is quite a task.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby alfishe » Thu Sep 07, 2017 5:21 pm

Sorgelig wrote:On computers where 68000 is used usually cycle accuracy is not required. It's more important how correct every instruction is executed. Minimig is pretty compatible with most Amiga 500-1200 software, so the CPU is not an issue.


In my opinion it's only because of architecture specifics where all user faced operations (gfx rendering, sound) are performed with co-processors with very strict and accurate timings but simple in structure and emulation. Every other platform that does everything using CPU - way more vulnerable to timings violation.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 5:32 pm

I know about Suska. The big problem for me is the fact i don't know Atari ST at all. And this is rather complex system to simply jump to porting.

I hope with new I/O board with second dedicated to FPGA SD card, porting of Suska will be easier.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 5:36 pm

ijor wrote:It is not cycle accurate. It is not even the developer's goal to be cycle accurate. He is more interested in implementing a Falcon (68030 level ST) compatible core, which is quite a task.

You are not correct. Their first goal was emulating ST(E) and they claim they've achieved a high accuracy and compatibility.
Falcon is next stage on which hey are working now.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 5:43 pm

With second SD card connected directly to FPGA, it will be possible to port the cores as-is without much rewriting.
It's not elegant solution, but the ported core will work not worse than on original FPGA-only boards. Probably every such core will require its own second SD card inserted into I/O board, but it's better than nothing.
There are many cores around and i'm the only one who is porting. So i simply have no time to do a deep porting. And i cannot work as a robot, so i also need a mood and fresh mind which implies some time when i have to rest and get more ideas and how-to.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby ijor » Thu Sep 07, 2017 7:15 pm

Sorgelig wrote:
ijor wrote:It is not cycle accurate. It is not even the developer's goal to be cycle accurate. He is more interested in implementing a Falcon (68030 level ST) compatible core, which is quite a task.

You are not correct. Their first goal was emulating ST(E) and they claim they've achieved a high accuracy and compatibility.
Falcon is next stage on which hey are working now.


Incorrect about what? Nothing that you said contradicts what I said. I know that the initial goal was STE. I've been in contact with Wolfgang (the Suska developer) since the early stages. I said it is not cycle accurate and it isn't and he doesn't claim it is. And as I said, he is currently more interested in the Falcon than developing a cycle accurate core (which would probably require rewriting good portions of the current core from scratch).

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby toromand » Thu Sep 07, 2017 7:24 pm

Even so, looking at the status page, it is probably a good candidate. I guess it is capable of running lots of ST/STE software.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 7:59 pm

Porting Suska C - no way..
Suska B can be a candidate to port, but it's unclear if they finished this version or not. Does anyone know?

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Thu Sep 07, 2017 8:04 pm

Be aware, that Suska-III-B features the SD card as a hard drive. This part of the configware is not open source.

sounds like full stop..
Although this info is 2 years old...

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby ijor » Fri Sep 08, 2017 2:19 am

Grabulosaure wrote:Hello !
This version of the Sega MegaDrive/Genesis core shows on the top of the screen two gauges, which indicates the FPGA temperature :
...
(And now, the trick question : How does it work ? ;-) )


Interesting. I guess you can estimate speed variations of the device that should mostly correspond to the temperature.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby ijor » Fri Sep 08, 2017 2:54 am

toromand wrote:Even so, looking at the status page, it is probably a good candidate. I guess it is capable of running lots of ST/STE software.


Certainly. Not sure it is much more compatible than MiST's own ST core, if at all. But why not, the more cores the better. It should be much easier to port MiST original port, though.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby PeFClic » Sun Sep 10, 2017 10:14 am

I've got some time this w-e and I've received the fan (sadly, not the thermal pad) to make a new cover for the MiSTer.

I've scanned the original acrylic cover provided with the nano board and designed a cover for the MiSTer with a hole for the fan.

I'm very satisfied with the result :
Image

For the cores that are not working, I'll make some pictures.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby nightshadowpt » Sun Sep 10, 2017 7:35 pm

Sorgelig wrote:There are many cores around and i'm the only one who is porting. So i simply have no time to do a deep porting.


From what I have seen you are carrying this project by yourself, but let me tell you that you have done an amazing job for a "one man show".

It is a pity that you haven't yet been able to gain enough traction on the project to attract other FPGA developers, but I believe it has the potential to be great in the future. For the time being, it still looks like it's under development (the daughter board) and until its features are stabilized, it will be difficult to fully replace MiST.

Until I get a Terasic board I will not be able to help you much, but I will follow the progress closely and get a board when the time is right.

I wish you the best and hope that you keep yourself motivated because this project deserves it.


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