I just looked at the mega65 site and it does look interesting.
The biggest attraction to this FPGA approach for me is learning how to program them.......
My knowledge of C64/128 internals is not bad so to me the logical thing is to re-implement the CIA 'my way' so too speak (and trust me is probably not going to be very good verilog code
Unfortunately, The C64 implementation is really quite strange from a timing point of view and in some areas hard to follow.
Some things are simply not even implemented at all..... For example , I had to add the ULTIMAX mode for the cartridges and the CIA's are only partially implemented
I am part way through a new CIA code which may or may not work
Finding time is hard at the mo but i AM working on it.
So far i have the IO / Timer A + B (partially) / ToD (partially) complete.