Search found 159 matches

by mc6809e
Mon Apr 13, 2015 3:50 am
Forum: Coding
Topic: MOD playing on Atari and Amiga
Replies: 63
Views: 13489

Re: MOD playing on Atari and Amiga

Not quite sure why you think the Amiga can only play back at 28 khz, but it can actually play back at 56 khz (interleave mode) - higher than the STe and the Amiga's Paula sound system supports variable playback sample rate, the STe only supports a few fixed rates. This makes playing samples as inst...
by mc6809e
Thu Feb 19, 2015 11:53 pm
Forum: Hardware
Topic: Shifter video interference
Replies: 14
Views: 3863

Re: Shifter video interference

Maybe the noise is being introduced by shifter itself. There could be noise on the power/ground to shifter. Could there be a failing decoupling cap somewhere?
by mc6809e
Wed Feb 18, 2015 5:31 am
Forum: Demos
Topic: 3D - F030 vs Amiga 1200
Replies: 218
Views: 45408

Re: 3D - F030 vs Amiga 1200

Just to wrap this up because it's way OT now: This discussion about sprites, HAM, blitter area fill for 3D, etc, reveals a big reason why, in practice, the Atari ST and Amiga were often nearly the same. What programmer that needed to feed himself was going to invest all that time learning enough abo...
by mc6809e
Wed Feb 18, 2015 5:21 am
Forum: Demos
Topic: 3D - F030 vs Amiga 1200
Replies: 218
Views: 45408

Re: 3D - F030 vs Amiga 1200

Bte 128 pixels per scanline is more than 1/3 pixels in 320x200 resolution! I would not say it is small, or bad? But each of those sprites is only 16 pixels wide. That's just 1/20th of a screen width. Once you start grouping them together to make bigger sprites, you quickly run out (unless you use t...
by mc6809e
Wed Feb 18, 2015 5:11 am
Forum: Demos
Topic: 3D - F030 vs Amiga 1200
Replies: 218
Views: 45408

Re: 3D - F030 vs Amiga 1200

At least the hardware sprites are still usable, though small -- just 128 pixels of sprite data per scanline. Had sprites been 32 pixels wide instead of just 16 there might have been a few more HAM games. 64 wide I believe and not 128. How many are available with scrolling extra fetch and fmode set ...
by mc6809e
Tue Feb 17, 2015 7:45 pm
Forum: Demos
Topic: 3D - F030 vs Amiga 1200
Replies: 218
Views: 45408

Re: 3D - F030 vs Amiga 1200

I think 16 bit chunky graphic mode is much better than HAM8, even that every Amiga enthusiast say the opposite :) Yeah, anyone who's a fan of moving graphics finds HAM less than optimal :) At least the hardware sprites are still usable, though small -- just 128 pixels of sprite data per scanline. H...
by mc6809e
Wed Feb 11, 2015 2:02 am
Forum: Demos
Topic: 3D - F030 vs Amiga 1200
Replies: 218
Views: 45408

Re: 3D - F030 vs Amiga 1200

I see. You probably have a very fuzzy idea what the DMA really is and why it has nothing to do with a separate BUSes at all. There is really only one data BUS between all chips and ChipRAM (see schematics if you don't believe me). When the CPU or DMA access the BUS, all other chips have to wait. Ac...
by mc6809e
Tue Feb 10, 2015 9:38 pm
Forum: Demos
Topic: 3D - F030 vs Amiga 1200
Replies: 218
Views: 45408

Re: 3D - F030 vs Amiga 1200

I see. You probably have a very fuzzy idea what the DMA really is and why it has nothing to do with a separate BUSes at all. There is really only one data BUS between all chips and ChipRAM (see schematics if you don't believe me). When the CPU or DMA access the BUS, all other chips have to wait. Ac...
by mc6809e
Sat Dec 20, 2014 2:30 am
Forum: 680x0
Topic: HBL, Timer B, Rasters color and jitter
Replies: 24
Views: 9994

Re: HBL, Timer B, Rasters color and jitter

I was told that, in simple terms, this is because the code is doing a lot of DIVS and MULS which take in the order of 160 clock cycles. The interrupt can't be triggered during the execution of the instruction (only at an instruction boundary) so it misses the start of the scanline a bit hence the j...
by mc6809e
Sat Dec 20, 2014 12:17 am
Forum: SuperCard Pro Disk Copier
Topic: List of difficult to copy disks
Replies: 598
Views: 65958

Re: List of difficult to copy disks

Yes i see some others disks with this effect. To be able to see this , the side 1 must be unformatted. i don't think that you recover something from this side, but sometime the software detect some valid Address/data mark.. I was thinking more along the lines of finding some way to cancel out the &...
by mc6809e
Fri Dec 19, 2014 7:41 pm
Forum: SuperCard Pro Disk Copier
Topic: List of difficult to copy disks
Replies: 598
Views: 65958

Re: List of difficult to copy disks

Here are more details. Gunship and P47 both use what I call intra-sector bit width variation. http://info-coach.fr/atari/software/GameAnalysis.php#air_sea_compil will be soon updated with more technical details Interesting magnetic ghost effect on the Gunship P47 :) Look at the unformatted side 1 :...
by mc6809e
Fri Dec 12, 2014 10:08 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

Maybe you could go complete async and just talk through a state machine running off the 8MHz clock that emulates the 68000 bus cycle. s0 and not ASp -> s1 s1 and clk -> s2 s2 and not clk -> s3 s3 and clk -> s4 s4 and not clk and not DTACKmb -> s5 s5 and clk -> s6 s6 and not clk -> s7 s7 and clk -> s...
by mc6809e
Fri Dec 12, 2014 5:10 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

CPU doesn't tell MMU when to start an access. It's the MMU that's in control. The MMU controls memory interleaving. if I remember correctly GLUE (not MMU) is responsible for the bus control. and if needed it inserts a wait states for the CPU. There's a pullup resistor (R30 on the 520ST) that tries ...
by mc6809e
Fri Dec 12, 2014 4:01 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

CPU doesn't tell MMU when to start an access. It's the MMU that's in control. The MMU controls memory interleaving. I think the MMU simply checks once every 4 CPU cycles for *AS from CPU to see if the CPU is requesting memory. If the MMU sees that the CPU wants memory, then the MMU latches the addre...
by mc6809e
Tue Dec 09, 2014 10:04 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

This has probably already been worked through but let me see if I understand. 68000 bus cycles can be completely asynchronous, with the system taking *DTACK low only when the data is actually ready. This works, but isn't the fastest way to move data in and out of the CPU. If the system waits to lowe...
by mc6809e
Mon Dec 08, 2014 11:35 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

Interesting. *DTACK should completely control the progress of the cycle. Any read or write should have wait states inserted as long as *DTACK is delayed. The CPU will stretch *AS accordingly.

I wonder if there's something in the logic that's asserting *DTACK too early.
by mc6809e
Mon Dec 08, 2014 8:49 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

Forgive my ignorance here, but can you tell me what it is that prevents you from simply running the 68K at 16MHz nearly all the time (except during I/O possibly) and simply letting *AS and *DTACK control the transfers asynchronously?
by mc6809e
Tue Dec 02, 2014 10:08 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

Looks like E clock will need a divide in speed then. Though I don't know how it works on Amiga. Surely E clock will get messed up as the CPU switches to 7mhz and 14mhz anyway ? We don't have this problem on Atari ;) I'm a bit surprised, actually. The keyboard interface and MIDI interface both use 6...
by mc6809e
Tue Dec 02, 2014 4:18 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

Any chance this thing might work on the Amiga?

Hey, just askin'!
by mc6809e
Sat Nov 29, 2014 9:13 pm
Forum: Professionals
Topic: programming for Falcon questions
Replies: 18
Views: 2810

Re: programming for Falcon questions

The biggest advantage of data caches is their ability to prefetch large chunks of data concurrently while other operations proceed concurrently. Typical optimizations involve constructing loops that operate on previously loaded data while triggering a cache miss with line fill to get new data ready ...
by mc6809e
Thu Nov 13, 2014 7:13 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

Blitter is allowed to run 16mhz only during TOS access, and when blitter does not have control of the bus. This way if blitter does internal operations, it is allowed to run at 16mhz. Maybe the problem is that internal operations are occurring between two standard 68K bus cycles, so while the inter...
by mc6809e
Thu Nov 13, 2014 1:18 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

I'm not convinced the cpu needs to be hitting memory to use up its bus cycles. I think this needs to be tested Counting CPU read/writes does seem to be unnecessarily complicated. A simple internal counter should be enough. Hmm. Maybe you're right: (From http://paradox.atari.org/files/BLIT_FAQ.TXT) ...
by mc6809e
Wed Nov 12, 2014 8:29 pm
Forum: Hardware
Topic: 4MB Upgrade & 16MHz Booster progress
Replies: 714
Views: 87471

Re: 4MB Upgrade & 16MHz Booster progress

So, you expect that blitter chip can work stable at 16 MHz ? I guess that some may, like it is case with FDC (WD1772) chip, but likely most will be not able. In case of 16 MHz mod, blitter works faster from simple reason: there is less time for wait that CPU finishes his "turn" :D So, bli...
by mc6809e
Wed Oct 15, 2014 7:05 pm
Forum: 680x0
Topic: Software sprites
Replies: 143
Views: 17225

Re: Software sprites

Unless the CPU keeps restarting the blitter, the blitter will spend lots of time sitting idle waiting for many cache misses. Uhg. actually restarting Blitter in blit mode is a common practice And how does the 68030 know when to restart the blitter? Think about what the code would look like. Any cod...
by mc6809e
Tue Oct 14, 2014 6:25 pm
Forum: C / PASCAL etc.
Topic: C way to daisychain interrupts
Replies: 29
Views: 9011

Re: C way to daisychain interrupts

You're correct if you mean that computed gotos are not an official part of C, but the GCC developers have included the feature in the language so it's defined by the GCC developers for their particular compiler. Yep. And the GCC manual states that the results of jumping outside of the current funct...

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